CA2034911A1 - Integrated data link controller with autonomous logical elements - Google Patents

Integrated data link controller with autonomous logical elements

Info

Publication number
CA2034911A1
CA2034911A1 CA2034911A CA2034911A CA2034911A1 CA 2034911 A1 CA2034911 A1 CA 2034911A1 CA 2034911 A CA2034911 A CA 2034911A CA 2034911 A CA2034911 A CA 2034911A CA 2034911 A1 CA2034911 A1 CA 2034911A1
Authority
CA
Canada
Prior art keywords
data
host
elements
autonomous
network
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA2034911A
Other languages
French (fr)
Other versions
CA2034911C (en
Inventor
Joseph Kevin Farrell
Jeffrey Scott Gordon
Daniel C. Kuhl
Timothy Vincent Lee
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of CA2034911A1 publication Critical patent/CA2034911A1/en
Application granted granted Critical
Publication of CA2034911C publication Critical patent/CA2034911C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/40Network security protocols
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/28Timers or timing mechanisms used in protocols
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/30Definitions, standards or architectural aspects of layered protocol stacks
    • H04L69/32Architecture of open systems interconnection [OSI] 7-layer type protocol stacks, e.g. the interfaces between the data link level and the physical level
    • H04L69/322Intralayer communication protocols among peer entities or protocol data unit [PDU] definitions
    • H04L69/324Intralayer communication protocols among peer entities or protocol data unit [PDU] definitions in the data link layer [OSI layer 2], e.g. HDLC

Abstract

INTEGRATED DATA LINK CONTROLLER WITH
AUTONOMOUS LOGICAL ELEMENTS

ABSTRACT OF THE DISCLOSURE

A single chip integrated data link control (IDLC) device provides full duplex data throughput and versatile protocol adaptation between variably configured time channels on a high speed TDM digital link (e.g. T-1 or T-3 line) and a host data processing system. The device handles multiple channels of mixed voice and data traffic concurrently, and thereby is suited for use in primary rate ISDN (Integrated Services Digital Network) applications.
Synchronous and asynchronous sections in the device respectively interface with the network and host system.
Special purpose autonomous logic elements in the synchronous section form plural stage receive and transmit processing pipelines between the network and host interfaces. Such pipelines perform OSI Layer 2 processing tasks on data in HDLC channels. Each autonomous element comprises one or more state machine circuits having functional autonomy and reduced time dependence relative to other elements. A
"resource manager" element (RSM) and time swap (TS) RAM
memory operate to dynamically swap states of pipeline elements in synchronism with channel time slots at the network interface, whereby the pipeline stages operate as data buffering stages which perform multiple tasks during any slot. The device contains integrated memory queues in which communication data and channel event status information are stacked for asynchronous transfer.
Capacities and modes of operation of these queues are selected to minimize effects on chip size, throughput and cost, while minimizing critical time dependencies between the device and host system. Device elements provide first and second non-interfering information transfer paths between the device and host system; one for exchanges of control/status information between the device and host, and the other for direct memory access transfers of communication data between the device and an external memory associated with the host.
CA002034911A 1990-03-15 1991-01-24 Integrated data link controller with autonomous logical elements Expired - Fee Related CA2034911C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US495,232 1990-03-15
US07/495,232 US5218680A (en) 1990-03-15 1990-03-15 Data link controller with autonomous in tandem pipeline circuit elements relative to network channels for transferring multitasking data in cyclically recurrent time slots

Publications (2)

Publication Number Publication Date
CA2034911A1 true CA2034911A1 (en) 1991-09-16
CA2034911C CA2034911C (en) 1994-03-29

Family

ID=23967817

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002034911A Expired - Fee Related CA2034911C (en) 1990-03-15 1991-01-24 Integrated data link controller with autonomous logical elements

Country Status (5)

Country Link
US (1) US5218680A (en)
EP (1) EP0449420B1 (en)
JP (1) JPH0720147B2 (en)
CA (1) CA2034911C (en)
DE (1) DE69132648T2 (en)

Families Citing this family (120)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5572572A (en) 1988-05-05 1996-11-05 Transaction Technology, Inc. Computer and telephone apparatus with user friendly interface and enhanced integrity features
US5485370A (en) 1988-05-05 1996-01-16 Transaction Technology, Inc. Home services delivery system with intelligent terminal emulator
US7421633B2 (en) 2005-03-21 2008-09-02 Texas Instruments Incorporated Controller receiving combined TMS/TDI and suppyling separate TMS and TDI
EP0453863A2 (en) * 1990-04-27 1991-10-30 National Semiconductor Corporation Methods and apparatus for implementing a media access control/host system interface
US5532841A (en) * 1990-07-31 1996-07-02 Minolta Camera Kabushiki Kaisha Facsimile apparatus comprising a plurality of image reading units
FR2670299B1 (en) * 1990-12-07 1993-01-22 Thomson Composants Militaires INTEGRATED CIRCUIT WITH PERIPHERAL TEST CONTROLLER.
EP0544963A1 (en) * 1991-11-29 1993-06-09 International Business Machines Corporation Parallel processing method for receiving and transmitting HDLC/SDLC bit streams
DE69333495T2 (en) * 1992-08-28 2004-09-16 Siemens Information and Communication Networks, Inc., San Jose ISDN layer 3 mask
US5875037A (en) * 1992-09-03 1999-02-23 Canon Kabushiki Kaisha Communication apparatus
US5623634A (en) * 1992-09-15 1997-04-22 S3, Incorporated Resource allocation with parameter counter in multiple requester system
JPH06274462A (en) * 1993-03-18 1994-09-30 Fujitsu Ltd Asynchronous writing system for shared memory
US5638530A (en) * 1993-04-20 1997-06-10 Texas Instruments Incorporated Direct memory access scheme using memory with an integrated processor having communication with external devices
US5424949A (en) * 1993-07-30 1995-06-13 Honeywell Inc. Multi-channel data receiver system
US5708659A (en) * 1993-10-20 1998-01-13 Lsi Logic Corporation Method for hashing in a packet network switching system
US5640399A (en) * 1993-10-20 1997-06-17 Lsi Logic Corporation Single chip network router
US5446726A (en) * 1993-10-20 1995-08-29 Lsi Logic Corporation Error detection and correction apparatus for an asynchronous transfer mode (ATM) network device
US5668809A (en) * 1993-10-20 1997-09-16 Lsi Logic Corporation Single chip network hub with dynamic window filter
US5802287A (en) * 1993-10-20 1998-09-01 Lsi Logic Corporation Single chip universal protocol multi-function ATM network interface
US5625825A (en) * 1993-10-21 1997-04-29 Lsi Logic Corporation Random number generating apparatus for an interface unit of a carrier sense with multiple access and collision detect (CSMA/CD) ethernet data network
US5826063A (en) * 1993-11-08 1998-10-20 Cirrus Logic, Inc. Apparatus and method for programming the setup, command and recovery time periods within a transaction cycle
US5592547A (en) * 1993-11-24 1997-01-07 Intel Corporation Processing audio signals using a discrete state machine
US5579389A (en) * 1993-11-24 1996-11-26 Intel Corporation Histogram-based processing of audio signals
US5566238A (en) * 1993-11-24 1996-10-15 Intel Corporation Distributed processing of audio signals
US5506969A (en) * 1993-11-29 1996-04-09 Sun Microsystems, Inc. Method and apparatus for bus bandwidth management
JPH07200432A (en) * 1993-12-17 1995-08-04 Internatl Business Mach Corp <Ibm> Data communication method and system-linking device
CA2135681C (en) * 1993-12-30 2000-01-18 Srinivas V. Makam System and method for directly accessing long-term memory devices
US5402416A (en) * 1994-01-05 1995-03-28 International Business Machines Corporation Method and system for buffer occupancy reduction in packet switch network
US6145071A (en) * 1994-03-03 2000-11-07 The George Washington University Multi-layer multi-processor information conveyor with periodic transferring of processors' states for on-the-fly transformation of continuous information flows and operating method therefor
JPH07262154A (en) * 1994-03-25 1995-10-13 Fujitsu Ltd Inter-processor communication control system
US5519863A (en) * 1994-09-21 1996-05-21 International Business Machines Corporation Notification forwarding discriminator
US5613163A (en) * 1994-11-18 1997-03-18 International Business Machines Corporation Method and system for predefined suspension and resumption control over I/O programs
US5553293A (en) * 1994-12-09 1996-09-03 International Business Machines Corporation Interprocessor interrupt processing system
US5758084A (en) * 1995-02-27 1998-05-26 Hewlett-Packard Company Apparatus for parallel client/server communication having data structures which stored values indicative of connection state and advancing the connection state of established connections
US5659756A (en) * 1995-03-31 1997-08-19 International Business Machines Corporation Method and system for providing access to logical partition information on a per resource basis
US6304574B1 (en) 1995-06-07 2001-10-16 3Com Corporation Distributed processing of high level protocols, in a network access server
US5694556A (en) * 1995-06-07 1997-12-02 International Business Machines Corporation Data processing system including buffering mechanism for inbound and outbound reads and posted writes
KR0186166B1 (en) * 1995-11-03 1999-04-15 구자홍 Error detecting device for a cd-rom driver
US5796832A (en) 1995-11-13 1998-08-18 Transaction Technology, Inc. Wireless transaction and information system
US5748968A (en) * 1996-01-05 1998-05-05 Cirrus Logic, Inc. Requesting device capable of canceling its memory access requests upon detecting other specific requesting devices simultaneously asserting access requests
US6373846B1 (en) 1996-03-07 2002-04-16 Lsi Logic Corporation Single chip networking device with enhanced memory access co-processor
US6535512B1 (en) 1996-03-07 2003-03-18 Lsi Logic Corporation ATM communication system interconnect/termination unit
US5920561A (en) * 1996-03-07 1999-07-06 Lsi Logic Corporation ATM communication system interconnect/termination unit
US5982749A (en) * 1996-03-07 1999-11-09 Lsi Logic Corporation ATM communication system interconnect/termination unit
US5841772A (en) * 1996-03-07 1998-11-24 Lsi Logic Corporation ATM communication system interconnect/termination unit
US5848068A (en) * 1996-03-07 1998-12-08 Lsi Logic Corporation ATM communication system interconnect/termination unit
US5748959A (en) * 1996-05-24 1998-05-05 International Business Machines Corporation Method of conducting asynchronous distributed collective operations
US5862340A (en) * 1996-05-24 1999-01-19 International Business Machines Corporation Method operating in each node of a computer system providing and utilizing special records for collective communication commands to increase work efficiency at each node
US5758161A (en) * 1996-05-24 1998-05-26 International Business Machines Corporation Testing method for checking the completion of asynchronous distributed collective operations
US6320865B1 (en) 1996-06-10 2001-11-20 University Of Maryland At College Park Method and apparatus for implementing time-based data flow control and network implementation thereof
US6072781A (en) * 1996-10-22 2000-06-06 International Business Machines Corporation Multi-tasking adapter for parallel network applications
US5696768A (en) * 1996-12-10 1997-12-09 Intel Corporation Method and apparatus for data storage array tracking
US5961659A (en) * 1997-06-30 1999-10-05 International Business Machines Corporation Independent simultaneous queueing of message descriptors
US5951706A (en) * 1997-06-30 1999-09-14 International Business Machines Corporation Method of independent simultaneous queueing of message descriptors
US6014729A (en) * 1997-09-29 2000-01-11 Firstpass, Inc. Shared memory arbitration apparatus and method
US5991856A (en) * 1997-09-30 1999-11-23 Network Associates, Inc. System and method for computer operating system protection
FR2769728B1 (en) * 1997-10-09 2000-01-28 St Microelectronics Sa IMPROVED METHOD AND SYSTEM FOR CONTROLLING SHARED ACCESS TO A RAM
FR2769727B1 (en) * 1997-10-09 2000-01-28 St Microelectronics Sa METHOD AND SYSTEM FOR CONTROLLING SHARED ACCESS TO A RAM
US6532239B1 (en) * 1997-12-27 2003-03-11 Hyundai Electronics Industries Co., Ltd. Transmission/reception concurrent matching apparatus for TDM channels and method thereof
US6487196B1 (en) 1998-05-29 2002-11-26 3Com Corporation System and method for simulating telephone use in a network telephone system
US6259691B1 (en) 1998-07-24 2001-07-10 3Com Corporation System and method for efficiently transporting dual-tone multi-frequency/multiple frequency (DTMF/MF) tones in a telephone connection on a network-based telephone system
US6345310B1 (en) 1998-07-28 2002-02-05 International Business Machines Corporation Architecture for a multiple port adapter having a single media access control (MAC) with a single I/O port
US6185631B1 (en) 1998-10-14 2001-02-06 International Business Machines Corporation Program for transferring execution of certain channel functions to a control unit and having means for combining certain commands and data packets in one sequence
US6408347B1 (en) 1998-12-10 2002-06-18 Cisco Technology, Inc. Integrated multi-function adapters using standard interfaces through single a access point
EP1171982B1 (en) * 1999-04-22 2007-07-25 Broadcom Corporation Gigabit ethernet with timing offsets between twisted-pair conductors
US6530057B1 (en) * 1999-05-27 2003-03-04 3Com Corporation High speed generation and checking of cyclic redundancy check values
US6463070B1 (en) * 1999-08-27 2002-10-08 Tachyon, Inc. System and method for clock correlated data flow in a multi-processor communication system
US6609165B1 (en) 1999-09-27 2003-08-19 International Business Machines Corporation Method and apparatus for using fibre channel extended link service commands in a point-to-point configuration
US6519637B1 (en) 1999-09-23 2003-02-11 International Business Machines Corporation Method and apparatus for managing a memory shortage situation in a data processing system
US6499066B1 (en) 1999-09-27 2002-12-24 International Business Machines Corporation Method and apparatus for using fibre channel test extended link service commands for interprocess communication
US6845104B2 (en) * 2000-06-14 2005-01-18 Ipr Licensing, Inc. Receiver for time division multiplex system without explicit time slot assignment
US6463074B1 (en) 2000-06-14 2002-10-08 Tantivy Communications, Inc. Receiver for time division multiplex system without explicit time slot assignment
US6691268B1 (en) * 2000-06-30 2004-02-10 Oak Technology, Inc. Method and apparatus for swapping state data with scan cells
GB2365286A (en) * 2000-07-27 2002-02-13 Ubinetics Ltd A method of data communications using an auxiliary channel
US6990528B1 (en) 2000-10-19 2006-01-24 International Business Machines Corporation System area network of end-to-end context via reliable datagram domains
US7636772B1 (en) 2000-10-19 2009-12-22 International Business Machines Corporation Method and apparatus for dynamic retention of system area network management information in non-volatile store
US7099955B1 (en) * 2000-10-19 2006-08-29 International Business Machines Corporation End node partitioning using LMC for a system area network
US7113995B1 (en) 2000-10-19 2006-09-26 International Business Machines Corporation Method and apparatus for reporting unauthorized attempts to access nodes in a network computing system
US6941350B1 (en) 2000-10-19 2005-09-06 International Business Machines Corporation Method and apparatus for reliably choosing a master network manager during initialization of a network computing system
US20020073257A1 (en) * 2000-12-07 2002-06-13 Ibm Corporation Transferring foreign protocols across a system area network
US7024662B2 (en) 2001-03-14 2006-04-04 Microsoft Corporation Executing dynamically assigned functions while providing services
US7539747B2 (en) * 2001-03-14 2009-05-26 Microsoft Corporation Schema-based context service
US20020133535A1 (en) * 2001-03-14 2002-09-19 Microsoft Corporation Identity-centric data access
US6823369B2 (en) * 2001-03-14 2004-11-23 Microsoft Corporation Using state information in requests that are transmitted in a distributed network environment
US7302634B2 (en) 2001-03-14 2007-11-27 Microsoft Corporation Schema-based services for identity-based data access
WO2002098065A1 (en) * 2001-05-31 2002-12-05 Omron Corporation Safety network system and safety slaves and safety controller and communication method and information gathering method and monitoring method in safety network system
WO2002097543A1 (en) * 2001-05-31 2002-12-05 Omron Corporation Safety unit, controller system, controller concatenation method, controller system control method, and controller system monitor method
EP1396771B1 (en) * 2001-05-31 2016-02-17 Omron Corporation Slave units and network system as well as slave unit processing method and device information collecting method
US7120505B2 (en) * 2001-06-22 2006-10-10 Omron Corporation Safety network system, safety slave, and safety controller
WO2003001307A1 (en) * 2001-06-22 2003-01-03 Omron Corporation Safety network system, safety slave, and communication method
EP1404061B1 (en) * 2001-06-22 2011-08-10 Omron Corporation Safety network system and safety slave
GB2381170A (en) * 2001-10-19 2003-04-23 Ipwireless Inc Method and arrangement for asynchronous processing of CCTrCH data
US20030172178A1 (en) * 2002-03-08 2003-09-11 Eduard Lecha Method to avoid high-level data link control (HDLC) frame abortion
US7246178B2 (en) * 2002-05-07 2007-07-17 Nortel Networks Limited Methods and systems for changing a topology of a network
US9886309B2 (en) 2002-06-28 2018-02-06 Microsoft Technology Licensing, Llc Identity-based distributed computing for device resources
JP3988559B2 (en) * 2002-07-18 2007-10-10 オムロン株式会社 COMMUNICATION SYSTEM, COMMUNICATION DEVICE, AND COMMUNICATION CONTROL METHOD
US7213084B2 (en) * 2003-10-10 2007-05-01 International Business Machines Corporation System and method for allocating memory allocation bandwidth by assigning fixed priority of access to DMA machines and programmable priority to processing unit
US20050177642A1 (en) * 2004-01-27 2005-08-11 Tetsuro Motoyama Method and system for managing protocols used to obtain status information from a network device
US9401822B2 (en) * 2005-06-09 2016-07-26 Whirlpool Corporation Software architecture system and method for operating an appliance exposing key press functionality to a network
US7813831B2 (en) * 2005-06-09 2010-10-12 Whirlpool Corporation Software architecture system and method for operating an appliance in multiple operating modes
US7729332B2 (en) * 2005-07-19 2010-06-01 Cisco Technology, Inc. Technique for transferring data from a time division multiplexing network onto a packet network
JP4641900B2 (en) * 2005-08-24 2011-03-02 ルネサスエレクトロニクス株式会社 Semiconductor device and test method
US7801121B1 (en) * 2006-04-20 2010-09-21 Altera Corporation Serial communications systems with cyclic redundancy checking
US7613840B2 (en) * 2006-08-17 2009-11-03 General Electric Company Methods and apparatus for dynamic data acquisition configuration parameters
WO2009057226A1 (en) * 2007-11-02 2009-05-07 Fujitsu Microelectronics Limited Signal processor unit and communication device
US8041747B2 (en) * 2008-02-20 2011-10-18 Fujitsu Ten Limited Data search device and gateway device in communication apparatus
US8502832B2 (en) * 2008-05-30 2013-08-06 Advanced Micro Devices, Inc. Floating point texture filtering using unsigned linear interpolators and block normalizations
US8558836B2 (en) 2008-05-30 2013-10-15 Advanced Micro Devices, Inc. Scalable and unified compute system
KR101465771B1 (en) * 2008-05-30 2014-11-27 어드밴스드 마이크로 디바이시즈, 인코포레이티드 Redundancy method and apparatus for shader column repair
JP5347772B2 (en) * 2009-07-01 2013-11-20 富士通株式会社 Transfer rate setting method, data transfer apparatus, and information processing system
US9262270B2 (en) * 2012-12-28 2016-02-16 Intel Corporation Live error recovery
FR3011420A1 (en) * 2013-09-30 2015-04-03 Orange IMPROVED MANAGEMENT OF NETWORK CONNECTIONS
US9325449B2 (en) 2013-12-06 2016-04-26 Intel Corporation Lane error detection and lane removal mechanism to reduce the probability of data corruption
US9397792B2 (en) 2013-12-06 2016-07-19 Intel Corporation Efficient link layer retry protocol utilizing implicit acknowledgements
US9628382B2 (en) 2014-02-05 2017-04-18 Intel Corporation Reliable transport of ethernet packet data with wire-speed and packet data rate match
US10426424B2 (en) 2017-11-21 2019-10-01 General Electric Company System and method for generating and performing imaging protocol simulations
US11349782B2 (en) * 2018-01-15 2022-05-31 Shenzhen Corerain Technologies Co., Ltd. Stream processing interface structure, electronic device and electronic apparatus
US11416336B2 (en) * 2019-10-15 2022-08-16 International Business Machines Corporation Managing parity data associated with configuration register data
WO2021107958A1 (en) * 2019-11-27 2021-06-03 Google Llc Detecting a frame-of-reference change in a smart-device-based radar system
CN111343106B (en) * 2020-02-25 2023-03-24 母国标 Multi-channel intermediate frequency digital signal processing device and method
US20220110117A1 (en) * 2020-10-05 2022-04-07 Qualcomm Incorporated Techniques for slot aggregation in full duplex wireless communications systems

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4188665A (en) * 1977-11-29 1980-02-12 International Business Machines Corporation Programmable communications subsystem
US4156796A (en) * 1977-11-29 1979-05-29 International Business Machines Corporation Programmable data processing communications multiplexer
EP0048781B1 (en) * 1980-09-26 1985-03-27 International Business Machines Corporation Communication line adapter for a communication controller
EP0077863B1 (en) * 1981-10-28 1986-09-17 International Business Machines Corporation Scanning device for communication lines, adapted for a communication controller
US4651316A (en) * 1983-07-11 1987-03-17 At&T Bell Laboratories Data link extension for data communication networks
FR2587159B1 (en) * 1985-09-12 1987-11-13 Coatanea Pierre MULTIPLEXING AND DEMULTIPLEXING EQUIPMENT FOR SYNCHRONOUS DIGITAL FLOW RATE AND VARIABLE MODULATION SPEED
US5048012A (en) * 1987-04-03 1991-09-10 Advanced Micro Devices, Inc. Data link controller with flexible multiplexer
EP0323222A3 (en) * 1987-12-25 1990-10-17 Nec Corporation System for sending and receiving a hdlc data frame on a time-division multiplex transmission path
US5029163A (en) * 1988-03-18 1991-07-02 At&T Bell Laboratories Synchronous protocol data formatter
DE3883528T2 (en) * 1988-06-16 1994-03-17 Ibm Parallel processing method and device for receiving and transmitting HDLC / SDLC bit streams.
US5012469A (en) * 1988-07-29 1991-04-30 Karamvir Sardana Adaptive hybrid multiple access protocols
US4965796A (en) * 1989-09-29 1990-10-23 At&T Bell Laboratories Microprocessor-based substrate multiplexer/demultiplexer
US5062105A (en) * 1990-01-02 1991-10-29 At&T Bell Laboratories Programmable multiplexing techniques for mapping a capacity domain into a time domain within a frame

Also Published As

Publication number Publication date
DE69132648T2 (en) 2002-04-25
DE69132648D1 (en) 2001-08-09
JPH04220844A (en) 1992-08-11
EP0449420A2 (en) 1991-10-02
EP0449420A3 (en) 1995-02-15
US5218680A (en) 1993-06-08
CA2034911C (en) 1994-03-29
JPH0720147B2 (en) 1995-03-06
EP0449420B1 (en) 2001-07-04

Similar Documents

Publication Publication Date Title
CA2034911A1 (en) Integrated data link controller with autonomous logical elements
CA2035673A1 (en) Integrated data link controller with synchronous link interface and asynchronous host processor interface
US5351043A (en) Queueing protocol
US4821265A (en) Node architecture for communication networks
US6735773B1 (en) Method and apparatus for issuing commands to a network processor configured to provide a plurality of APIs
US5956337A (en) ATM switch interface
US6108726A (en) Reducing the pin count within a switching element through the use of a multiplexer
US5241541A (en) Burst time division multiplex interface for integrated data link controller
US7031330B1 (en) Very wide memory TDM switching system
EP0510290A1 (en) Collision-free insertion and removal of circuit-switched channels in a packet-switched transmission structure
WO1997003527A2 (en) Integrated services digital network (isdn) telecommunication software and implementation
US4949338A (en) Arbitration in multiprocessor communication node
EP0382363B1 (en) Method and apparatus for multiplexing sub-rate channels in a digital data communication system
US4975695A (en) High speed communication processing system
US5349583A (en) Multi-channel token ring
CN101313481B (en) Method and apparatus using back board service bus for service transmission
Ahuja S/Net: A high-speed interconnect for multiple computers
US6163827A (en) Method and apparatus for round-robin flash channel arbitration
US6785270B1 (en) TDM switching system and ASIC device
EP1428355B1 (en) Method for improving the utilization of a time-division multiplexed communication link of a signal transfer point, and a corresponding signal transfer point
US5349679A (en) Communication control unit for selecting a control mode of data communication and selectively bypassing an interprocessor interface
US6178180B1 (en) Communications adapter for processing ATM and ISDN data
US20020172221A1 (en) Distributed communication device and architecture for balancing processing of real-time communication applications
US6690670B1 (en) System and method for transmission between ATM layer devices and PHY layer devices over a serial bus
US5432788A (en) Scheduling method for a slotted communication medium with multiple but limited number of carriers and independent receiver/transmitter pairs

Legal Events

Date Code Title Description
EEER Examination request
MKLA Lapsed