CA1286384C

CA1286384C - Single/multiple transducer for measuring one or more physical quantitiesof different kind or electric variables

Info

Publication number: CA1286384C
Application number: CA000542861A
Authority: CA
Inventors: Luciano Manenti; Riccardo Marazzi; Mario Nicotra; Gianpaolo Monterosso
Original assignee: Nicotra Sistemi SpA
Current assignee: Nicotra Sistemi SpA
Priority date: 1986-07-24
Filing date: 1987-07-23
Publication date: 1991-07-16
Anticipated expiration: 2008-07-16
Also published as: EP0254142A3; DE3774198D1; IT8621245A0; ES2004157T3; ES2004157A4; US4881071A; EP0254142B1; EP0254142A2; DE254142T1; IT1213111B

Abstract

ABSTRACT OF THE DISCLOSURE

The single/multiple transducer for measuring physical quantities and variables comprises a multiplexer for selecting the sensors of physical quantities and electric variables by decoding of an address, thereby permitting a single power supply, a single counter and a single clock generator to be used in order to enable a plurality of sensors placed in a plurality of locations and to transmit the measurements thereof, each of said sensors detecting its own physical quantity or electric variable.

Description

The present invention generally relates to transducers and more particularly to a transducer capable of detecting one or more physical quantities (for example pressure, temperature, moisture) or electric variables (for example voltage, current and resistance).

When using data acquisition systems a problem which normally is met is the physical connection between the transducer and the apparatus for the acquisition of the measurement provided by a sensor.

Often one is obliged to provide complex electric systems having multiple wire cables for connecting the sensors located along the network or alternatively to install decentralized or satellite data acquisition units which are connected to a single data line to the data acquisition unit proper.

This technique has revealed to be quite expensive because a plurality of devices are required to meet the aboved-mentioned purpose, these devices requiring in turn relatively high servicing as well as installation costs.

The present invention reduces in a substantial manner the costs associated with obtaining the measurements of the physical quantities and electric variables as well as the operating costs of the transducers involved in such measurements.
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According to the present invention there is provided a transducer for measuring one or more physical quantities and ; electric variables, comprising at least one sensor, each of said at least one sensor detecting either a physical quantity or an electric variable, and outputting a frequency signal having a frequency which is proportional to a level of either .
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said at least one sensor, and for transmitting each said fre-quency signal received from each of said at least one sensor; an address generator for forming and deliverlng to sald multiplexer unit each said coded address assigned to each of sald at least one sensor; a clock generator connected to said multlplexer unit through sald generator, for controlling a rate of operation of said multiplexer unit and said address generator; a power supply unlt for delivering an operating voltage to sald multiplexer unit, said clock generator, and said address generator; and a single loop for supplylng electric power to said power supply unit and for dellvering each sald frequency signal transmitted from said multiplexer unit. Suitably said address generator comprlses a programming device for generating each of said coded address. Desirably said multiplexer unit includes a voltage level shifter for enabling said multiplexer unlt and a power supply enabling clrcuit for enabllng said power supply unit when measuring 19 requlred. Preferably sald address counter comprlses a blnary counter, and whereln sald programmlng devlce comprlses brldges connectlng outputs of sald blnary counter to sald multlplexer unlt.

In one embodlment of the present lnventlon each of sald at least one sensor comprlses a voltage-to-frequency clrcult for outputtlng a frequency slgnal whlch is proportional to a voltage applled to an lnput of sald voltage-to-frequency converter.
Sultably said address generator comprlses a blnary counter.
Sultably sald multlplexer unlt ls comprlsed of a plurallty of analog multlplexers.

Wlth thls system a slngle palr of wlres for transmlt-tlng measurements relatlng to dlfferent physlcal quantltlesand/or electrlc varlables can be used, so that there will be no longer requlred transducers ln the number equal to the number of the physical quantltles and/or physical quantlty or varlable detected by the sensors.
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With this system a single pair of wires for transmit-ting measurements relating to different physical quantities and/or electric variables can be used, so that there will be no longer required transducers in the number equal to the number of the physical quantities and/or electric variables and timers in the number equal to the number of transducers thereby providing important savings both as to the component costs and as to the operation thereof.

The present invention will be further illustrated by way of the accompanying drawings, in which:-Fig. 1 is a block diagram of a single/multiple trans-ducer in accordance with the present invention;

Fig. 2 shows the circuit diagram of the address genera-tor and the programming device;

Fig. 3 shows the clrcult dlagram of the tlmlng and selectlng clrcult and the enabllng clrcult of the multiplexer unit; and ,:
Fig.s 4A & 4B show the circuit diagram of the multi-plexer proper.

Referring now to Fig. l, the transducer comprises a plurality of sensors SO,Sl,S2,S3....S9 connected to a multiplexer unit 2 which is energized by a stabilized power supply 5, a clock generator 3 and an address generator 4. The address generator 4 ls connected to the multlplexer unlt 2 and to a device 7 for pro-grammlng the address code by the operator or installer.

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3~34 The sensor is designed so as to generate at its output a signal of a frequency which is proportional to the physical quantities or electric variables in accordance with a well known technique, as for example:

- the integrated circuit of NATIONAL SEMICONDUCTOR LM 555 and its ;~ 35 ~ - 3a -,. ,~ ~ .

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~36384 equivalents applied as voltage-to-frequency converter (VCO) which permits the conversion of the voltage to frequency;
- the VCO circuit d;sclosed in "Appl;cat;on Note 81" AN81-3 ;ssued ;n June 1973 described in "LINEAR APPLICATION HAND~OOK" of the National Semiconductor.
The voltage-to-frequency converter circuit permits to have as an output a frequency s;gnal which ;s proportional to the voltage appl;ed to its input.
Should a suitable resistor change its resistance, a voltage change thereacross w;ll occur.
This voltage, when applied to the vcO circuit, allows a signal to be measured, the frequency of which is proportional to the electric resistance change.
The clock generator 3 is of a conventional constructions and is capable of emitting clock s;gnals CLK with a fixed frequency as well as RESET signals.
As can be seen ;n Fig. 2, the address generator 4 comprises a b;nary counter 20 having seven outputs 23 to 29. The outputs 23 to 29 of the binary counter 20 are connected through diodes D2 to D8 to the programming device 7.
The programming dev;ce 7 is formed by an interface 30 comprising seven bridges EIR which connect the outputs 23 to 29 to the wires 31 to 37 which are connected to the output line 38 in order to provide in a binary code the device address. In effect, the wires 31 to 37 supply bits of we;gt 1 to 6. Line 38 is connected at one end to a capac;tor C2 connected to ground. Lead 38 suppl;es the address signal H to the mult;plexer unit and to the two inputs of a ~!AND gate 22, the output of wh;ch suppl;es the inverted address s;gnal H, on the lead 39, also to the mult;plexer un;t 2 and to one ;nput of a NAND gate 21, to the other input of which the signal CLK is applied and the output of which is connected as input to the binary counter 20.
The mu~tipLexer un;t 2 is comprised of four blQcks, namely:

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1) Timing and selecting circuit 2) Level adaptor 3) Powcr supply enabling circuit 4) Multiplexer.
As can be seen in Fig. 3, the timing and selecting circuit comprises a binary counter 40 supplied by the voltage Vcc and having as an input the inverted signal H coming from the programming device 30 through lead 39. The outputs 41 to 44 of the binary counter 40 sup-ply signals of binary count as inputs to a level adaptor 45 which gi-ves on its outputs the binary coded signals M,N,O,P,Q adapted for the multiplexer unit. Lead 39 of the inverted address signals H is also applied, through a d;ode D9, to an input of the level adaptor 45.
Output 44 ;s also connected to ground through a diode D11 and a re-sistor R7. From the binary counter 40 two outputs 46,47 are connected to the two inputs of a NAND g~te 48 the output of wh;ch ;s connected, through a res;stor R5, to one input of NAND gate 49, the output of which supplies a signal X to the power supply circuit. Intermediate the resistor R6 and the NAND gate 49 a d;ode D10 is connected through a lead 50 which suppl;es the address s;gnal H. The outputs 42,44 of the binary counter 40 are also applied to the two inputs of a NAND
gate 51 the output of which is connected to one input of another NAND
gate 52, the other input of which is connected to the output 44 of the binary counter 40. The output of the NANV gate 52 supplies a signal which is applied as one input to the level adaptor 45. The output of the NAND gate 51 is also connected to one input of the NAND gate 49 and to one input of a further NAND gate 53 to the other input of which the clock signal CLK is applied and the output of which is connected to the binary counter 40.
The multiplexer unit 2 is illustrated in Fig. 4A and 4B and compri-ses the analogue multiplexers 60,61,62. The multiplexers 60,62 receive as jnp~ts the signals U0 to U9 which control the bases of transistors T1 to T1p of the power supply enabling circuit. These multiplexers ., receive also as inputs the coded signals M N O P Q coming from the level adaptor 45. The multiplexer 61 supplies the signals fO to f9 and is set to rece;ve the frequency signal f t coming from the sensor se-lected by the multiplexer unit by means of the coded signals M N O P
from the level adaptor.
The operation of the single/multiple transducer according to this invention is as follows.
When to the power supply circuit 5 the a.c. voltage is applied the power supply 5 provides the necessary operating d.c. voltages Ve Vc and Vcc to the clock generator 3 the address generator 4 and the mul-tiplexer unit 2 respectively.
Then the clock generator 3 starts to deliver to address generator 4 a cha;n of clock pulses CLK hav;ng a stable and precise frequency. By employ;ng this frequency the address generator 4 makes a count genera-ting a different bit code for each pulse. The clock generator supplies also a RESET signal to the address generator 4 for its initialization.
When the generated code is the same as the code programmed by the operator or installer through the programming device 7 (obtained by connecting one or more of the bridges ~R in this device) the address generator 4 generates on the output 38 the address signal H correspon-d;ng to the first sensor S0 which can be a sensor of a physical quantit;es or the condition of the contacts associated to pressure sw;tches hum;distas flow regulators relays as well as electric variables such as voltage resistance current and so on. Th;s address signal H is suppl;ed to the timing and selecting circuit.

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The signal H suitably inverted through the NAND gate 22 is suppl;ed tothe multiplexer unit 2 in order to keep it to zero as long as all the outputs 23 to 29 connected to the capacitor C2 through the programming device 30 are in the logic state "1" Only with this precise configuration the capacitor C2 is kept charged (logic level "1") thereby bringing the signal H to a high level. The signal H, suitably inverted by the NAND gate 22 starts the binary counter 40, the outputs 41 to 44 of which are applied to the level adaptor 45 which g;ves as output the coded signals M,N,O,P,Q for the multiplexers 61,62 The signal H at the same time disables the address generator 4 by locking the clock signal CLK to the binary counter 20 by means of the NAND
gate 21 This address is decoded by the multiplexer unit 2 which diverts to the selected one of the sensors SO to S9 the operating voltage Ve from the power supply S and also diverts the frequency signal f t generated by the sensor through the power supply S and to the signal oùtput line 6.
The start of the measurings is provided by the inverted address signal H coming from the address generator 4 through wire 39 The binary counter 40 rema;ns with all the outputs 41-46 low as long as the inverted address signal H is high, thereby desabling all the cascade connected blocks. Oy bringing the H signal to the logic level O the binary counter 40 starts to count thereby giving again on its outputs 41 to 44 a binary count which through the level adaptor circuit 45 form the "words" M,N,O,P,Q necessary for the multiplexer unit to select the sensors SO to S9 The supplied voltage Ve is generated exclusively when the signal X coming from the output of the NAND gate 49 is at a low level "O". The signal X is applied to the power supply circuit 5 for controlling it. This enabling circuit is therefore intended to establish when the signal X is to be brought to O through the NAND gates 48,51 and 49.
During the selection, the logic levels of these NAND gates bring ~ J)"

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the signal X to a low log;c level for 3/4 of the select;on time of the sensor. The high logic level of signal X is permitted, before the selection, by the address signal ~ entering through wire 50 and, after the selection, by the signal coming from the output of the NAND gate 51. Another function of this enabling circuit is to distribute the supply voltages VeO to Ve9 to the various sensors. This function is carried out by a set of transistors T1 to T10 (Fig. 4~) controlled through their bases by the multiplexers 60,62. The bases of these transistors supply to the multiplexers 60,62 the signals UO to U9. sy connecting the base of the pre-selected transistor to the resistor R8 the voltage Ve is present on the collector of the same transistor.
After a short predetermined time is elapsed, the address generator 4 interrupts the signal output and then the address generator 4 generates the coded address corresponding to the following sensor.
This procedure will be repeated as many times as the sensors connected to the multiplexer unit 2 are.
As can be seen, the pressure transducer comprises:
- a multiplexer unit which enables and selects the sensor correspon-ding to the coded address presented at a suitable input thereof;
- a clock generator for the counting chain;

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3~34 - a counting and timing circuit which generates the address to be supplied to the multiplexer for selecting one of the externally connected sensors;

- a power supply for delivering the operating voltage to the remaining components of the circuit; and - the line on which the power is supplied and the signal proportional to the physical quantity or electric variable is generated by the sensors.

By means of this system each of the sensors can be connected through the transducer to a single pair of wires without interfering with each other during the transmission of the measurement to the acquisition unit, thereby permitting an important installation saving and a quicker operation of the system to be obtained. These devices operate with very low currents and are remotely supplied by the same pair of wires on which they send the response signal and therefore do not need to be locally power supplied.

The acquisition unit directly provides the necessary voltage for the regular operation of the transducer.

By means of this single/multiple transducer one or more transducers measuring different variables can be connected one a single line. For example, on a single pair of wires temperature sensors, pressure sensors, current sensors, moisture sensors and all the sensors providing on their outputs a voltage, a current or a resistance can be ~ connected.

- The advantages provided by the single/multiple transducer according to this invention with respect to the single pressure transducers are the following:
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1) Cost reductions for each measurement because the costs of the common components are divided by the number of used measurement locations.

2) Substantial cost savings in the single/multiple transducer installation because it is sufficient to make a single electric connec-- 9a -~ .: . - . - ' , - . : , -- ' -: .- . : . : .

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tion to tile location in w~lic~ it is desired to detect the physical quantity.
3) Operatiny cost reduction of the sir~yle/multiple transducers because a single loop is used.

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Claims

1. A transducer for measuring one or more physical quantities and electric variables, comprising: at least one sensor, each of said at least one sensor detecting either a physical quantity or an electric variable, and outputting a frequency signal having a frequency which is proportional to a level of either said detected physical quantity or said detected electric variable; a multiplexer unit for selecting and enabling said at least one sensor according to a coded address assigned to each of said at least one sensor, and for transmitting each said frequency signal received from each of said at least one sensor; an address generator for forming and delivering to said multiplexer unit each said coded address assigned to each of said at least one sensor; a clock generator connected to said multiplexer unit through said address generator, for controlling a rate of operation of said multiplexer unit and said address generator; a power supply unit for delivering an operating voltage to said multiplexer unit, said clock generator, and said address generator: and, a single loop for supplying electric power to said power supply unit and for delivering each said frequency signal transmitted from said multiplexer unit.

2. A transducer as claimed in claim 1, wherein said address generator comprises a programming device for generating each said coded address.

3. A transducer as claimed in claim 1, wherein said multiplexer unit includes a voltage level shifter for enabling said multiplexer unit and a power supply enabling circuit for enabling said power supply unit when measuring is required.

4. A transducer as claimed in claim 1, wherein said address generator comprises a binary counter.

5. A transducer as claimed in claim 1, wherein each of said at least one sensor comprises a voltage-to-frequency converter for outputting a frequency signal which is proportional to a voltage applied to an input of said voltage-to-frequency converter.

6. A transducer as claimed in claim 2, wherein said address generator comprises a binary counter, and wherein said programming device comprises bridges connecting outputs of said binary counter to said multiplexer unit.

7. A transducer as claimed in claim 1, wherein said power supply unit is a stabilized power supply.

8. A transducer as claimed in claim 1, wherein said multiplexer unit is comprised of a plurality of analog multiplexers.