CA1252216A - Apparatus for automatically inspecting objects and identifying or recognizing known and unknown portions thereof, including defects and the like and method - Google Patents
Apparatus for automatically inspecting objects and identifying or recognizing known and unknown portions thereof, including defects and the like and methodInfo
- Publication number
- CA1252216A CA1252216A CA000504151A CA504151A CA1252216A CA 1252216 A CA1252216 A CA 1252216A CA 000504151 A CA000504151 A CA 000504151A CA 504151 A CA504151 A CA 504151A CA 1252216 A CA1252216 A CA 1252216A
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- CA
- Canada
- Prior art keywords
- digital signal
- shapes
- image
- signal information
- board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
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Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T7/00—Image analysis
- G06T7/0002—Inspection of images, e.g. flaw detection
- G06T7/0004—Industrial image inspection
- G06T7/001—Industrial image inspection using an image reference approach
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T2207/00—Indexing scheme for image analysis or image enhancement
- G06T2207/20—Special algorithmic details
- G06T2207/20036—Morphological image processing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T2207/00—Indexing scheme for image analysis or image enhancement
- G06T2207/30—Subject of image; Context of image processing
- G06T2207/30108—Industrial image inspection
- G06T2207/30141—Printed circuit board [PCB]
Abstract
ABSTRACT
Apparatus and method for automatically inspecting ob-jects and identifying or recognizing known and unknown portions thereof, including defects and the like, involving storing digital signal information representing an image of the desired predetermined object shapes to be learned by an image inspect-ing system and recognized during scanning of objects to be inspected, and modifying the stored digital signal information to create a fictitious image of the object shapes to be learned that incorporates acceptable size or dimension variations and the like in such objects such that during the inspecting of future objects, these acceptable variations will be ignored as defects or unknown elements.
Apparatus and method for automatically inspecting ob-jects and identifying or recognizing known and unknown portions thereof, including defects and the like, involving storing digital signal information representing an image of the desired predetermined object shapes to be learned by an image inspect-ing system and recognized during scanning of objects to be inspected, and modifying the stored digital signal information to create a fictitious image of the object shapes to be learned that incorporates acceptable size or dimension variations and the like in such objects such that during the inspecting of future objects, these acceptable variations will be ignored as defects or unknown elements.
Description
The present invention relates to improved methods of and apparatus for automatic real-time high-speed inspection of objects for such purposes as identifying known and unknown portions thereof, pattern recognition, defect identification, and the like.
A most satisfactory new approach to these problems is described in applicant's copending Canadian Patent Application Serial No. 504,151, filed March 20, 1984. The underlying process involved in the approach of said copending application will be subsequently summarized, the same differing from prior art and other current approaches to defect inspection and the like as applied, for example, to printed circuit boards and related applications (as described in said copending application) in the obviating of the requirements for pre-programming and software programming with image storing of each picture feature to be monitored, or the use of detailed masks and the like, including, if desired, with pre-calculation or programming of such criterea as minimum conductor line widths and similar criterea.
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A most satisfactory new approach to these problems is described in applicant's copending Canadian Patent Application Serial No. 504,151, filed March 20, 1984. The underlying process involved in the approach of said copending application will be subsequently summarized, the same differing from prior art and other current approaches to defect inspection and the like as applied, for example, to printed circuit boards and related applications (as described in said copending application) in the obviating of the requirements for pre-programming and software programming with image storing of each picture feature to be monitored, or the use of detailed masks and the like, including, if desired, with pre-calculation or programming of such criterea as minimum conductor line widths and similar criterea.
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2-To the contrary, the approach of said copending applica-tion and the preferred application of the improvements of the present invention resides in causing the apparatus to "learn"
the desired shapes in a "good'! ob~ect, such as a reference printed circuit board, (as by actual scanninS of a "good"
ob~ect or by CAr/CAM or other signal input), and then to recog-nize deviations therefrom in real tlme scanning of future ob~ects. Signals representing images of such an ob~ect or parts thereof at effectively different magnifications are pre-sented to constant ~ield Or view tFoV) processors, one corres-ponding to each magnificatlon and having its own respective memory. The shapes in the images are learned by storing the slgnals of the images in the respective memories. Ob~ects to be inspected are scanned and the signals representing their images at said effectively dif~erent magnifications are pre-sented to the corresponding processors. By comparing the stored signals with the last-named signals, a determinatlon is made of shapes not previously learned, and thus defects are indicated.
The presentation at effectively different magnifications is effected by providing signals in me~ory correspondlng to an image having the lowest magnification but wlth the resolution of the highest magnification, and extracting different portions of the image for the differen~ magnifications, and quantlzing the same into sub-elements that constitute tile said constant field of view.
.6 The signal images are also preferably pertebated at different magnifications by amounts small compared to the reso-lution element at the corresponding magnifi.c2tion to discrimi-nate false errors from shapes not learned.
Consider the case, as an illustration, in which the inspection is to locate a break bet~een a conductive pad and a conductor line or. a printed circuit card or board or similar device. Initially, the board ls scanned at high ma~ni~ication until a break is detected. Upon detection, the magnification ls decreased to determlne whether the pad conductor configura-tlon surrounds the break. To perform this task, the inspection correlates pattern information obtained at different magnifica-tions of the same ob~ect area to identify certain patterns. In other situations, on the other hand, when the pattern of interest is larger than the FOV provided by the lowest magnifi-cation ob~ective, the inspection involves viewing contiguous fields and-combining pattern information from each field to identify the ob~ect.
There are two categories of operation to consider; those dealing with lmage acquisition and those dealing with image recognition. Image acquisition cornprises:
1. Obtaining images of the ob~ect at one or more magni~i-cations;
2. Constructing these images using the minimum number of required light levels; (In the inspection of a copper--conductor printed circuit board or card, the inspec-tion is only concerned with the presence and absence of metalization and not with small variations in copper reflectivity; so the number of light levels of interest may be limited in order to facilitate the recognition process.); and
the desired shapes in a "good'! ob~ect, such as a reference printed circuit board, (as by actual scanninS of a "good"
ob~ect or by CAr/CAM or other signal input), and then to recog-nize deviations therefrom in real tlme scanning of future ob~ects. Signals representing images of such an ob~ect or parts thereof at effectively different magnifications are pre-sented to constant ~ield Or view tFoV) processors, one corres-ponding to each magnificatlon and having its own respective memory. The shapes in the images are learned by storing the slgnals of the images in the respective memories. Ob~ects to be inspected are scanned and the signals representing their images at said effectively dif~erent magnifications are pre-sented to the corresponding processors. By comparing the stored signals with the last-named signals, a determinatlon is made of shapes not previously learned, and thus defects are indicated.
The presentation at effectively different magnifications is effected by providing signals in me~ory correspondlng to an image having the lowest magnification but wlth the resolution of the highest magnification, and extracting different portions of the image for the differen~ magnifications, and quantlzing the same into sub-elements that constitute tile said constant field of view.
.6 The signal images are also preferably pertebated at different magnifications by amounts small compared to the reso-lution element at the corresponding magnifi.c2tion to discrimi-nate false errors from shapes not learned.
Consider the case, as an illustration, in which the inspection is to locate a break bet~een a conductive pad and a conductor line or. a printed circuit card or board or similar device. Initially, the board ls scanned at high ma~ni~ication until a break is detected. Upon detection, the magnification ls decreased to determlne whether the pad conductor configura-tlon surrounds the break. To perform this task, the inspection correlates pattern information obtained at different magnifica-tions of the same ob~ect area to identify certain patterns. In other situations, on the other hand, when the pattern of interest is larger than the FOV provided by the lowest magnifi-cation ob~ective, the inspection involves viewing contiguous fields and-combining pattern information from each field to identify the ob~ect.
There are two categories of operation to consider; those dealing with lmage acquisition and those dealing with image recognition. Image acquisition cornprises:
1. Obtaining images of the ob~ect at one or more magni~i-cations;
2. Constructing these images using the minimum number of required light levels; (In the inspection of a copper--conductor printed circuit board or card, the inspec-tion is only concerned with the presence and absence of metalization and not with small variations in copper reflectivity; so the number of light levels of interest may be limited in order to facilitate the recognition process.); and
3~ Dividing each image at each magni~ication into N2 dis-crete receptor elements.
Image recognition comprises performing any number of combina-tions of the following operations to locate patterns of inter-est:
1. Examining the N2 elements from each field at each mag-nification independently looking -for a pattern of in-terest within each field;
2. Correlating patterns of the same object area generated at diEferent magnlfications;
3. Combining pattern information generated from conti-guous fields at a single magnification; and
Image recognition comprises performing any number of combina-tions of the following operations to locate patterns of inter-est:
1. Examining the N2 elements from each field at each mag-nification independently looking -for a pattern of in-terest within each field;
2. Correlating patterns of the same object area generated at diEferent magnlfications;
3. Combining pattern information generated from conti-guous fields at a single magnification; and
4. Performing recognition 3, above, at each of the dif-ferent magnifications and correlating the obtained pattern information.
In applying this type of inspection philosophy to machine and electronic simulation or operation, as disclosed in said copending application, a first step (a) is performed oE creat-ing a hiyh resolution large field (HRLF) image memory for ~2 ~,~
. , .
simulat~on of FOV's at different magnlfications The field has an area coverage equal to that of a low magnification obJec-tive~ but has the resolution of a high magnification. The field size is selected to accommodate the largest slngle pattern of interest. For a printed clrcult board or card, this usually corresponds to a field size su~ficient to store 1 1/2 to 2 pads. It is interesting to note that if one attempted to store all the patterns in even a moderately sized HRL~ image, an astronomical amount o~ memory would be required. ~or exam-ple, i~ the HRLF image contalned only 32 x 32 pixels and each pixel was represented as a single binary bit, a total o~:
232 = 10154 memory locations would be required. To eliminate this memory requirement and still accomplish the desired tasls~ one proceeds in accordance with this inspection technique to (b) select FOV's that represent the desired magniflcations; (c) divide each FOV into N x N elements; (d) set the brightness value of each element equal ~o the average brightness value of the plxels within the element; (e) quantize the brlghtness value of each element lnto the minimum number of light levels requlred to represent the pattern; and (f) use the quantized element values as the address to a recogni~ion memory and store infor-mation about the pattern in the addressed location. If each element is quantized into b bits and there exists a total of N2 ... .
~5~
,.~
elements, then the recognition memory would contain 2bn locations.
At step (g), a separate recognition memor~ is used ~or each FOV. To inspect a printed circuit card, each element is quantized lnto two light levels to represent the presence or - absence o~ metal within the element. This corresponds to b =
l. For b = 1, the table below lists the number o~ 64K memory chips requlred to store the 2N2 patterns as a ~unction o~ N~.
. Number o~Number o~ Possible Number of Elements (N2)Patterns (2N ) 64 K Memorles 32 5.12 x 102 42 6.55 x 104 52 3.35 x 107 . 512 62 6.87 x 1011,04~,576 ;
.
To "learn" a new ob~ect for the flrst time, all the above cperations are performed and a unique pattern of elements (POE) composed of bN2 bits is generated for each FOV. Each POE is applied to the address lines of the recogni5ion memory for the speci~ic FOV. At each accessed address location~ an identifi cation code is entered to tell the memor~ that thls pattern has been seen.
In the inspect mode, the ob~ect is scanned and operations (a) through (g) above are performed. The contents of each accessed memor~ locatlon for each ~OV is read to determine whether the pattern has been prevlously seen. If within a given area of the ob~ect a sufficlently large number of unseen patterns exists, the area ls identified as ~oreign. This usually constitutes a defect when inspectlng a prlnted circuit card ln the above lllustration.
There are occasions, however, where limited variations in conductor shapes or dlmensions on the printed circuit board from those on the reference or standard or "good" circuit board or other obJect are entlrely acceptable; and, though di~erent ~rom the learned shapes or dimenslons, should accord~ngly not be flagged as a defect. As an example, thinner (or thicker) versions of learned shapes may be acceptable within f~
predetermined ranges of tolerances from art work, such as later-described CAD/CAM data, or in etching the printed circuit boards ~or other types of objects, more generically). Improve-ments in providing electronic flexibility automatically to teach the machine such allowable shape~dimension tolerances or permissible variations, and to enable improved art work defect detection itself and registration o~ the same, are thus princi-pal objectives of the present invention.
~ n object of the present invention, accordingly, is to provide a ne~ and improved method oE and apparatus for automa-tic real-time high-speed inspection of objects that are not subject to the previously described limitations o other sys~
tems, but provide a unlversal approach to pattern recognition, defect identification and related problems, with the improved flexibility to embrace variations or deviations within prede-termined limits in shape and/or dimensions of the patterns learned from reference or "good" object standards.
A further object is-to provide a novel high-speed automa-tic recognition and identification method and apparatus operat-ing under the inspection philosophy and technique described in said copending application with other improvements in object shape identification and other operational features including, ' ~52;~6 _g but not limited to, acceptable printed circuit card via holes in conductive pads, and acceptable tolerances in registration or alignment.
Still a further object is to provide such a novel method and apparatus that is of more general utility and application, as well.
Other and further objects will be explained hereinafter, being more particuiarly delineated in the appended claims.
In surnmary, from one of its important aspects as applied to printed circuit boards and similar applications, the inven-tion embraces a method of inspection of circuit board conductor shapes wherein digital signal information is stored represent-ing shapes to be monitored in future board inspections, the method comprisingr storing digital signal information represen-ting an image of a desired predetermined object shape to be learned; predetermining at least one of acceptable size or dimension variations in such object shapes as conductor lines, interconnects, patterns and pads and acceptable hole and hole position variations in pads; modifying the stored digltal sig-nal information to create a fictitious image of said object shapes to be learned that incorporates the acceptable varia-tions therein; storing the modified digital signal information representing said fictitious stored image; and, during the . , inspecting of future boards, ignoring saicl acceptable varia-tions as possible defects by responding to recognition of the same in the said fictitious stored image. In another aspect, by comparison of coordinate location variations, registration or alignment can be checlced. Other features of the invention and preferred and best mode embodlments, including preferred apparatus and constructional details, are hereinafter pre-sented.
~ he lnventlon will now be described wlth reference to the accompanylng drawln~s, Fig. 1 o~ whlch is a combined block and circult diagram illustratlng a preferred inspection system operating in accordance with the above-described inspection technlque and embodying the improvement features of the present lnventlon;
~ igs~ 2 and 3a, b and c are vlews of circuit board conduc-tors and tolerances ln dimensions of the same;
Flg. 4 is a block circuit diagram of a preferred sub-sys-tem ~or particularly advantageous use in the machine of Fig. 1 to enable the automatic learnlng of a range of dimensional variations or tolerances in learned shape lmages that are satis~actory to the lnspection, such as, for example, varia-tions in manufactured versions (such as printed circuit boards or other ob~ects) from art work and the like;
Fig. 5 is a similar diagram of a modification for detect-ing via holes in PCB pads and the like and predetermined tolerances therein; and Figs. 6A, B and Fig~ 7 illustrate the use of reflected and bac~ or transmitted light, respectively, particularly useful for PCB inspection with feed-through holes and the like; and Fig. ~ illus~rates reference and inspected board pictures at particular x,y positions.
Considering Fig. 1, a system is illustrated constructed in the manner described in said copending application, ~ith op-ti-cal scanning oE an area or a region of interest of an object PCB (abbreviation for the illustrative example of a printed circuit board), being shown as performed by a "CCD" imager, so labelled. Digitizing the scanned signals in real time is effected in an analog-to-digital converter A/D to produce successive trains of digital signals corresponding to the opti-cal scanned lines. The digitized output of CCD is then trans--ferred into a two-dimensional buffer memory BM and then into a sliding window memory SWM ~o create large field high resolution images. This technique enables the resolution to be equal to that obtained from high magnification objectives, while the FOV
is equal to or greater than that obtained from low magnifica~
tion objectives. In addition, object blurring can be totally eliminated by moving the object PCB in a plane (shown horizon--~2-tal with X-Y coordinates) perpendicular to the axls of the CCD
and reading out the CCD into the buffer memory Brl each time the ob~ect image has moved a distance equal to one CCD element;
which may, for example, be approximately 1/2000 of an inch.
Specifically, the analog signal output of the CCD, after conversion to digital form by the A/D converter (which may be in the form of a conventional sampling pixel quantizer, so labelled) is trans~erred into the buffer me~ory BM (which can be moclelled as a serles of shift registers each equal in length to the number of CCD elements). The digital output of each shift register is connected to the input of the next register and also to one row of the sliding window memory SWM such that the lmage appearing in the window memory S~ is similar to what would be seen by moving a magnifying glass over the entire ob~ect. This is schematically illustrated within the block S~l by FOVS and FOVL (later described) seen in the window memory S~l, corresponding to high and low ~a~nification, respectively.
The optical configuration incorporated in the system of Fig. 1 is extremely flexible. The image size of the ob~ect produced on the CCD can be magnified or demagnified ~from 1/3 x to 3 x using, for example, a photo lens L1~ 2 x to 10 x or 1/2 x to 1/10 x using an imaging lens) by simply moving the relative positions of the CCD, lens L1 and obJect PCB. Slnce ~s~
the CCD is relativel~ very long (1728 pixels for a Reticon CCD
apparatus, for example~ and 2000 pixels ~or a Fairchild equip-ment) and each pixel is extremely small (0.64 mils for Reticon, 0.5 mils for Fairchild), a large var~ety of high resolution large field images are obtainable.
The operation o~ the system of Fig. l with the improve-ments of the present invention will now be explained for input signals generated from either the CCD lmager or computer-generated CAD/CAM equipment. In the ~ollowing example, the apparatus ls taught khe superimposqd lmage o~ the two sLdes Or the printed circuit board obJect PCB. Recognition codes are computed directly ~rom signals supplied by the CAD/CAil system that designed the board. These codes are then compared with codes being generated from the CCD image signals as the CCD
scans the printed circuit board and checking for front to back pattern registration.
To teach the machlne the "good" or reference PCB pattern, digital signals from the CAD/CAM system A, ~ig. 1, are supplied to the later-described shape-modifying module B. In accordance with the inventionl this module B adds and/or deletes picture elements (pixels) along obJect boundaries within predetermined tolerances. Adding pixels serves effectively to thicken lines and pads; and deleting pixels, t~lins lines and pads. The number * trade marks ~5~ .6 of pixels added or subtracted sets the range of allowable line - width and pad dimension tolerances which may exist on the final PCB, such as the fictitious dashed or dottecl outlines in the example of Fig. 2. These modified digital image signals are ~: then learned by the apparatus, as later explained. For exam-ple, if up to a + 2 pixel tolerance is desired, images are !' learned at +0, ~1 and ~2 pixels. These modified signals are generated in a sequential linear fashion representing consecu-tive lines of the image. A number o~ lines "L" are then stored in the be~ore-mentioned buffer memory BM (Fig. l) to create a two dirnensional image equal to the width o~ one CCD scan line.
From buffer BM, as previously described, the rows oE
pixels are fed to sliding window memory SWM of dimensional size W x W pixels, where W>L. In one preferred mode of implementa-tion, the SWM may, for example, contain 32 x 32 pixels. Fig.
3a illustrates a typical image of a pad which would be con-_ tained within the SWM of such size. It is interesting to high-light at this juncture that if one were to attempt to store all the possible patterns that could be seen in an SWM of only 32 x 32 pixels, where each pixel is represented by a single binary bit, one would require, as previously stated, a total of 232 = 1o154 memory locations. To eliminate this memory re-quirement and still accomplish the desired task of recognizing s~
all pattern types, the ollowing functions are performed in accordance with the invention:
Function 1~
Divide the sliding window memory Sw~l into fields of view (FOV) of decreasing size and subdivide each FOV
into N X N sections. Each section referred to as an element.
Fig. 3a illustrates the small and large field of view of FOV S and FOV L, respectively, previously referred to in connection with block SWM oE Fig. 1, and Figs. 3b and c illu-strate the division of these two FOV's into N x N elements for N - 4.
The next function performed in accordance with the inven-tion is:
Function 2.
Set the brightness value of each element equal to the average brightness value of the pixels con~ained in each element, and represent each average element value with V bits.
Functions 1 and 2 are both performed in blocX (e) of Fig. 1, illustrating c2 pixels (VC2 bits) applied from SWM, and the FOV
with c2 pixels divided into N2 elements (E11 ~ E1n ~ Enl Enn) with each element having (C/N)2 pixels. The average brightness Yalue for each element is then computed and avail-able at the output o~ ~e), as shown.
~ The invention then utilizes element quantization at (f), Fig. 1, performing:
Function 3.
Quantize the average brightness value of each element represented by V bits into the minimum number of bits Y required to represent the pattern.
For example, in the inspection o~ objects such as PCB's, one is only interested in the presence and absence oE metalized con-ductors on the board. I~, thereEore, more than 50~ oE the pixels contained in the spatial area of an element indicate the presence of metal, the entire element may be said to contain metal, and is accordingly quantized to the logical value 1. If ; this condition does not exist, the element is considered to be void of metal and is quantized to the logical value 0. In this example, of course, Y equals one bit.
The invention uses this quantized brightness value for ~~~
address input in a recognition memory (j), Fig. 1, in perform-ing the next step:
Function 4.
Use the yN2 quantized element values, representing a .6 ;
unique pattern of elements labelled POE (upper-right, Fig. l), as the address to a recognition memory (~) and store this information about the pattern in the addressed location. Given yr~2 bits, there exists 2yn memory locations in the memory (~).
As before stated, in accordance with the invention a separate processing is employed for each different FOV as defined by:
Function 5 Use a separate "FOV Processor" composed of an element computational unit (e), Fig. 1, element quantizer (f), and recognltion memory (J), to process each FOV
extracted from the slldlng window memor~ S~l. (Note ; "FOV Processor For Field S" and block to left labelled "FOV Processor For Field L", etc.).
Under the technique of the invention, in order for the machine to "learn" the shapes of a new obJect for the first time, ~unctions l through 5, above, are per~ormed ~or each FOV
extracted from the S~, Fig. 1. A unique pattern o~ elements (POE) composed of yN2 bits is generated for each FOV and is applied to the address lines ("ADDRESS IN" in Fig. 1) o~ the recognition memory (J) within each FOV processor. At each ; accessed memory locatlon, an ~denti~ication code is entered to indicate that that pattern has been learned. This may be referred to as Functlon 6.
In this e~ample, the CAD/CAr~ s~stem supplies signals to the inspection apparatus in a learn mode to describe the super-position of the front and back sides o~ the printed circui~
board innerlayer for later inspection of registration. Fields of view (FOV) up to W x W pixels are extracted ~rom sliding window memory S~ and the last-described operatlon (Function 6) is performed in each FOV processor.
Whether the CAD/CAM provided the learning signals or an actual CCD scan of a standard ob~ect, the apparatus is now ready for use in inspection--Function 7. The ob~ect under test is scanned, and operatlonal functions 1 through 5, above7 are performed. The contents of each accessed memory location in each FOV processor recognition memory is read to determine whether the pattern has been previously learned and addressed in recognition memory (~). If, within a given area of the ob-Ject, a sufficiently large number o~ previously unseen or unlearned patterns exist, the area is identified as foreign or~
for exampleJ a defect.
- To implement this foreign-area detection functionJ a t~o-dimensional error code memor~ is used, shown to the left ln block (k) of Fig. 1. Thls memory stores codes read from the recognition memory (j) indicating whether patterns have been previously seen and learned. If, within the two-dimensional area covered by the memory, the number of unseen patterns exceeds a minimum predetermined number, shown summed and com-pared with the minimum MV in (k), Fig. 1, an image of the foreign area is then passed to a computer (L) for further iden-tification, if such is desired.
In this illustrative example, a PCB innerlayer may be inspected Eor front-to-back pattern registration by placing the innerlayer on a glass top x-y table (to the left in Fig. 1), with illumination provided from beneath. The illumination passes through the innerlayer creating an image on the CCD
which is the superposition of the two sides of the board. As the x-y table scans the image across the CCD, functions 1 through 5 and function 7, above, are performed. Upon detection of a foreign area, an image of the area is displayed on TV
monitor TV, Fig.l, and the x-y coordinates are recorded. If a suficient number of foreign patterns exist, the two sides of the PCB innerlayer are considered to be mis-aligned.
Another application of the invention is the generation of drill tapes for automatic drilling of pads in the final PCB.
"3 In this application, a negative artwork containing the position of all pads serves as the OBJECT and is scanned on the x-y table with the illumination placed beneath the artwork. Images of pads are learned. The artwork is now rescanned with the apparatus placed in the inspect mode. Each time a pad is recognized, pad center coordinates are recorded (as at L) on a drill tape (not shown) which may later be used to drill the final PCB.
As before explained, one oE the important improvernents of this invention resides in the obviating of the necessity for "le~rning" and storing in me~ory all the tolerable variations in shapes and/or dimensions of "good" objects, such as PCB
lines, pads, etc., through use of the shape-modifying module B
of Fig. 1 which adds or removes picture elements (pixels) along all boundaries or perimeters to produce fictitious images of tolerable thick or thin versions of the actual image. Whereas a particular object thickness may have been learned, fictitious thinner or thicker versions ~within acceptable tolerances) wlll be recognized as if they were the standard shape, It is in order, to describe a useful form of shape modifying module, illustrated in Fig. 4, for the case of a line thinning modifier B. Nine single unit delays A through I, t~o line delays LDl and LD2, equal in length to that of the CCD, and one read-only memory ROM comprise the module. The signal input comes from the CCD of Fig. 1, which is then delayed by three unit delays
In applying this type of inspection philosophy to machine and electronic simulation or operation, as disclosed in said copending application, a first step (a) is performed oE creat-ing a hiyh resolution large field (HRLF) image memory for ~2 ~,~
. , .
simulat~on of FOV's at different magnlfications The field has an area coverage equal to that of a low magnification obJec-tive~ but has the resolution of a high magnification. The field size is selected to accommodate the largest slngle pattern of interest. For a printed clrcult board or card, this usually corresponds to a field size su~ficient to store 1 1/2 to 2 pads. It is interesting to note that if one attempted to store all the patterns in even a moderately sized HRL~ image, an astronomical amount o~ memory would be required. ~or exam-ple, i~ the HRLF image contalned only 32 x 32 pixels and each pixel was represented as a single binary bit, a total o~:
232 = 10154 memory locations would be required. To eliminate this memory requirement and still accomplish the desired tasls~ one proceeds in accordance with this inspection technique to (b) select FOV's that represent the desired magniflcations; (c) divide each FOV into N x N elements; (d) set the brightness value of each element equal ~o the average brightness value of the plxels within the element; (e) quantize the brlghtness value of each element lnto the minimum number of light levels requlred to represent the pattern; and (f) use the quantized element values as the address to a recogni~ion memory and store infor-mation about the pattern in the addressed location. If each element is quantized into b bits and there exists a total of N2 ... .
~5~
,.~
elements, then the recognition memory would contain 2bn locations.
At step (g), a separate recognition memor~ is used ~or each FOV. To inspect a printed circuit card, each element is quantized lnto two light levels to represent the presence or - absence o~ metal within the element. This corresponds to b =
l. For b = 1, the table below lists the number o~ 64K memory chips requlred to store the 2N2 patterns as a ~unction o~ N~.
. Number o~Number o~ Possible Number of Elements (N2)Patterns (2N ) 64 K Memorles 32 5.12 x 102 42 6.55 x 104 52 3.35 x 107 . 512 62 6.87 x 1011,04~,576 ;
.
To "learn" a new ob~ect for the flrst time, all the above cperations are performed and a unique pattern of elements (POE) composed of bN2 bits is generated for each FOV. Each POE is applied to the address lines of the recogni5ion memory for the speci~ic FOV. At each accessed address location~ an identifi cation code is entered to tell the memor~ that thls pattern has been seen.
In the inspect mode, the ob~ect is scanned and operations (a) through (g) above are performed. The contents of each accessed memor~ locatlon for each ~OV is read to determine whether the pattern has been prevlously seen. If within a given area of the ob~ect a sufficlently large number of unseen patterns exists, the area ls identified as ~oreign. This usually constitutes a defect when inspectlng a prlnted circuit card ln the above lllustration.
There are occasions, however, where limited variations in conductor shapes or dlmensions on the printed circuit board from those on the reference or standard or "good" circuit board or other obJect are entlrely acceptable; and, though di~erent ~rom the learned shapes or dimenslons, should accord~ngly not be flagged as a defect. As an example, thinner (or thicker) versions of learned shapes may be acceptable within f~
predetermined ranges of tolerances from art work, such as later-described CAD/CAM data, or in etching the printed circuit boards ~or other types of objects, more generically). Improve-ments in providing electronic flexibility automatically to teach the machine such allowable shape~dimension tolerances or permissible variations, and to enable improved art work defect detection itself and registration o~ the same, are thus princi-pal objectives of the present invention.
~ n object of the present invention, accordingly, is to provide a ne~ and improved method oE and apparatus for automa-tic real-time high-speed inspection of objects that are not subject to the previously described limitations o other sys~
tems, but provide a unlversal approach to pattern recognition, defect identification and related problems, with the improved flexibility to embrace variations or deviations within prede-termined limits in shape and/or dimensions of the patterns learned from reference or "good" object standards.
A further object is-to provide a novel high-speed automa-tic recognition and identification method and apparatus operat-ing under the inspection philosophy and technique described in said copending application with other improvements in object shape identification and other operational features including, ' ~52;~6 _g but not limited to, acceptable printed circuit card via holes in conductive pads, and acceptable tolerances in registration or alignment.
Still a further object is to provide such a novel method and apparatus that is of more general utility and application, as well.
Other and further objects will be explained hereinafter, being more particuiarly delineated in the appended claims.
In surnmary, from one of its important aspects as applied to printed circuit boards and similar applications, the inven-tion embraces a method of inspection of circuit board conductor shapes wherein digital signal information is stored represent-ing shapes to be monitored in future board inspections, the method comprisingr storing digital signal information represen-ting an image of a desired predetermined object shape to be learned; predetermining at least one of acceptable size or dimension variations in such object shapes as conductor lines, interconnects, patterns and pads and acceptable hole and hole position variations in pads; modifying the stored digltal sig-nal information to create a fictitious image of said object shapes to be learned that incorporates the acceptable varia-tions therein; storing the modified digital signal information representing said fictitious stored image; and, during the . , inspecting of future boards, ignoring saicl acceptable varia-tions as possible defects by responding to recognition of the same in the said fictitious stored image. In another aspect, by comparison of coordinate location variations, registration or alignment can be checlced. Other features of the invention and preferred and best mode embodlments, including preferred apparatus and constructional details, are hereinafter pre-sented.
~ he lnventlon will now be described wlth reference to the accompanylng drawln~s, Fig. 1 o~ whlch is a combined block and circult diagram illustratlng a preferred inspection system operating in accordance with the above-described inspection technlque and embodying the improvement features of the present lnventlon;
~ igs~ 2 and 3a, b and c are vlews of circuit board conduc-tors and tolerances ln dimensions of the same;
Flg. 4 is a block circuit diagram of a preferred sub-sys-tem ~or particularly advantageous use in the machine of Fig. 1 to enable the automatic learnlng of a range of dimensional variations or tolerances in learned shape lmages that are satis~actory to the lnspection, such as, for example, varia-tions in manufactured versions (such as printed circuit boards or other ob~ects) from art work and the like;
Fig. 5 is a similar diagram of a modification for detect-ing via holes in PCB pads and the like and predetermined tolerances therein; and Figs. 6A, B and Fig~ 7 illustrate the use of reflected and bac~ or transmitted light, respectively, particularly useful for PCB inspection with feed-through holes and the like; and Fig. ~ illus~rates reference and inspected board pictures at particular x,y positions.
Considering Fig. 1, a system is illustrated constructed in the manner described in said copending application, ~ith op-ti-cal scanning oE an area or a region of interest of an object PCB (abbreviation for the illustrative example of a printed circuit board), being shown as performed by a "CCD" imager, so labelled. Digitizing the scanned signals in real time is effected in an analog-to-digital converter A/D to produce successive trains of digital signals corresponding to the opti-cal scanned lines. The digitized output of CCD is then trans--ferred into a two-dimensional buffer memory BM and then into a sliding window memory SWM ~o create large field high resolution images. This technique enables the resolution to be equal to that obtained from high magnification objectives, while the FOV
is equal to or greater than that obtained from low magnifica~
tion objectives. In addition, object blurring can be totally eliminated by moving the object PCB in a plane (shown horizon--~2-tal with X-Y coordinates) perpendicular to the axls of the CCD
and reading out the CCD into the buffer memory Brl each time the ob~ect image has moved a distance equal to one CCD element;
which may, for example, be approximately 1/2000 of an inch.
Specifically, the analog signal output of the CCD, after conversion to digital form by the A/D converter (which may be in the form of a conventional sampling pixel quantizer, so labelled) is trans~erred into the buffer me~ory BM (which can be moclelled as a serles of shift registers each equal in length to the number of CCD elements). The digital output of each shift register is connected to the input of the next register and also to one row of the sliding window memory SWM such that the lmage appearing in the window memory S~ is similar to what would be seen by moving a magnifying glass over the entire ob~ect. This is schematically illustrated within the block S~l by FOVS and FOVL (later described) seen in the window memory S~l, corresponding to high and low ~a~nification, respectively.
The optical configuration incorporated in the system of Fig. 1 is extremely flexible. The image size of the ob~ect produced on the CCD can be magnified or demagnified ~from 1/3 x to 3 x using, for example, a photo lens L1~ 2 x to 10 x or 1/2 x to 1/10 x using an imaging lens) by simply moving the relative positions of the CCD, lens L1 and obJect PCB. Slnce ~s~
the CCD is relativel~ very long (1728 pixels for a Reticon CCD
apparatus, for example~ and 2000 pixels ~or a Fairchild equip-ment) and each pixel is extremely small (0.64 mils for Reticon, 0.5 mils for Fairchild), a large var~ety of high resolution large field images are obtainable.
The operation o~ the system of Fig. l with the improve-ments of the present invention will now be explained for input signals generated from either the CCD lmager or computer-generated CAD/CAM equipment. In the ~ollowing example, the apparatus ls taught khe superimposqd lmage o~ the two sLdes Or the printed circuit board obJect PCB. Recognition codes are computed directly ~rom signals supplied by the CAD/CAil system that designed the board. These codes are then compared with codes being generated from the CCD image signals as the CCD
scans the printed circuit board and checking for front to back pattern registration.
To teach the machlne the "good" or reference PCB pattern, digital signals from the CAD/CAM system A, ~ig. 1, are supplied to the later-described shape-modifying module B. In accordance with the inventionl this module B adds and/or deletes picture elements (pixels) along obJect boundaries within predetermined tolerances. Adding pixels serves effectively to thicken lines and pads; and deleting pixels, t~lins lines and pads. The number * trade marks ~5~ .6 of pixels added or subtracted sets the range of allowable line - width and pad dimension tolerances which may exist on the final PCB, such as the fictitious dashed or dottecl outlines in the example of Fig. 2. These modified digital image signals are ~: then learned by the apparatus, as later explained. For exam-ple, if up to a + 2 pixel tolerance is desired, images are !' learned at +0, ~1 and ~2 pixels. These modified signals are generated in a sequential linear fashion representing consecu-tive lines of the image. A number o~ lines "L" are then stored in the be~ore-mentioned buffer memory BM (Fig. l) to create a two dirnensional image equal to the width o~ one CCD scan line.
From buffer BM, as previously described, the rows oE
pixels are fed to sliding window memory SWM of dimensional size W x W pixels, where W>L. In one preferred mode of implementa-tion, the SWM may, for example, contain 32 x 32 pixels. Fig.
3a illustrates a typical image of a pad which would be con-_ tained within the SWM of such size. It is interesting to high-light at this juncture that if one were to attempt to store all the possible patterns that could be seen in an SWM of only 32 x 32 pixels, where each pixel is represented by a single binary bit, one would require, as previously stated, a total of 232 = 1o154 memory locations. To eliminate this memory re-quirement and still accomplish the desired task of recognizing s~
all pattern types, the ollowing functions are performed in accordance with the invention:
Function 1~
Divide the sliding window memory Sw~l into fields of view (FOV) of decreasing size and subdivide each FOV
into N X N sections. Each section referred to as an element.
Fig. 3a illustrates the small and large field of view of FOV S and FOV L, respectively, previously referred to in connection with block SWM oE Fig. 1, and Figs. 3b and c illu-strate the division of these two FOV's into N x N elements for N - 4.
The next function performed in accordance with the inven-tion is:
Function 2.
Set the brightness value of each element equal to the average brightness value of the pixels con~ained in each element, and represent each average element value with V bits.
Functions 1 and 2 are both performed in blocX (e) of Fig. 1, illustrating c2 pixels (VC2 bits) applied from SWM, and the FOV
with c2 pixels divided into N2 elements (E11 ~ E1n ~ Enl Enn) with each element having (C/N)2 pixels. The average brightness Yalue for each element is then computed and avail-able at the output o~ ~e), as shown.
~ The invention then utilizes element quantization at (f), Fig. 1, performing:
Function 3.
Quantize the average brightness value of each element represented by V bits into the minimum number of bits Y required to represent the pattern.
For example, in the inspection o~ objects such as PCB's, one is only interested in the presence and absence oE metalized con-ductors on the board. I~, thereEore, more than 50~ oE the pixels contained in the spatial area of an element indicate the presence of metal, the entire element may be said to contain metal, and is accordingly quantized to the logical value 1. If ; this condition does not exist, the element is considered to be void of metal and is quantized to the logical value 0. In this example, of course, Y equals one bit.
The invention uses this quantized brightness value for ~~~
address input in a recognition memory (j), Fig. 1, in perform-ing the next step:
Function 4.
Use the yN2 quantized element values, representing a .6 ;
unique pattern of elements labelled POE (upper-right, Fig. l), as the address to a recognition memory (~) and store this information about the pattern in the addressed location. Given yr~2 bits, there exists 2yn memory locations in the memory (~).
As before stated, in accordance with the invention a separate processing is employed for each different FOV as defined by:
Function 5 Use a separate "FOV Processor" composed of an element computational unit (e), Fig. 1, element quantizer (f), and recognltion memory (J), to process each FOV
extracted from the slldlng window memor~ S~l. (Note ; "FOV Processor For Field S" and block to left labelled "FOV Processor For Field L", etc.).
Under the technique of the invention, in order for the machine to "learn" the shapes of a new obJect for the first time, ~unctions l through 5, above, are per~ormed ~or each FOV
extracted from the S~, Fig. 1. A unique pattern o~ elements (POE) composed of yN2 bits is generated for each FOV and is applied to the address lines ("ADDRESS IN" in Fig. 1) o~ the recognition memory (J) within each FOV processor. At each ; accessed memory locatlon, an ~denti~ication code is entered to indicate that that pattern has been learned. This may be referred to as Functlon 6.
In this e~ample, the CAD/CAr~ s~stem supplies signals to the inspection apparatus in a learn mode to describe the super-position of the front and back sides o~ the printed circui~
board innerlayer for later inspection of registration. Fields of view (FOV) up to W x W pixels are extracted ~rom sliding window memory S~ and the last-described operatlon (Function 6) is performed in each FOV processor.
Whether the CAD/CAM provided the learning signals or an actual CCD scan of a standard ob~ect, the apparatus is now ready for use in inspection--Function 7. The ob~ect under test is scanned, and operatlonal functions 1 through 5, above7 are performed. The contents of each accessed memory location in each FOV processor recognition memory is read to determine whether the pattern has been previously learned and addressed in recognition memory (~). If, within a given area of the ob-Ject, a sufficiently large number o~ previously unseen or unlearned patterns exist, the area is identified as foreign or~
for exampleJ a defect.
- To implement this foreign-area detection functionJ a t~o-dimensional error code memor~ is used, shown to the left ln block (k) of Fig. 1. Thls memory stores codes read from the recognition memory (j) indicating whether patterns have been previously seen and learned. If, within the two-dimensional area covered by the memory, the number of unseen patterns exceeds a minimum predetermined number, shown summed and com-pared with the minimum MV in (k), Fig. 1, an image of the foreign area is then passed to a computer (L) for further iden-tification, if such is desired.
In this illustrative example, a PCB innerlayer may be inspected Eor front-to-back pattern registration by placing the innerlayer on a glass top x-y table (to the left in Fig. 1), with illumination provided from beneath. The illumination passes through the innerlayer creating an image on the CCD
which is the superposition of the two sides of the board. As the x-y table scans the image across the CCD, functions 1 through 5 and function 7, above, are performed. Upon detection of a foreign area, an image of the area is displayed on TV
monitor TV, Fig.l, and the x-y coordinates are recorded. If a suficient number of foreign patterns exist, the two sides of the PCB innerlayer are considered to be mis-aligned.
Another application of the invention is the generation of drill tapes for automatic drilling of pads in the final PCB.
"3 In this application, a negative artwork containing the position of all pads serves as the OBJECT and is scanned on the x-y table with the illumination placed beneath the artwork. Images of pads are learned. The artwork is now rescanned with the apparatus placed in the inspect mode. Each time a pad is recognized, pad center coordinates are recorded (as at L) on a drill tape (not shown) which may later be used to drill the final PCB.
As before explained, one oE the important improvernents of this invention resides in the obviating of the necessity for "le~rning" and storing in me~ory all the tolerable variations in shapes and/or dimensions of "good" objects, such as PCB
lines, pads, etc., through use of the shape-modifying module B
of Fig. 1 which adds or removes picture elements (pixels) along all boundaries or perimeters to produce fictitious images of tolerable thick or thin versions of the actual image. Whereas a particular object thickness may have been learned, fictitious thinner or thicker versions ~within acceptable tolerances) wlll be recognized as if they were the standard shape, It is in order, to describe a useful form of shape modifying module, illustrated in Fig. 4, for the case of a line thinning modifier B. Nine single unit delays A through I, t~o line delays LDl and LD2, equal in length to that of the CCD, and one read-only memory ROM comprise the module. The signal input comes from the CCD of Fig. 1, which is then delayed by three unit delays
5~
at A, B and C. The output of the CCD is also delayed one line at LDl and then fed into delay units D, E and F. In addition, the output of the first delay unit LDl is delayed a second line in the line delay LD2, the output of which is applied to unit delays G, H and I, thus creating a three-by-three matrix or blo~k data~ The ~ata arising from each of the delay units A, B, C, D, E, F, G, H and I is applied to corresponding address lines ~bearing the same letters) to the read-only memory ROM.
Th~ contents of the read-only memory ROM is a new computed value with the center element of the three-by-three data block. One can select the proper output from the read-only memory ROM to indicate what the new computed value is; such that one output line 00 may be the data if one wants a thinner line image; or output line 01 if one wants to thicken the image line. If desired, to obtain thicker or thinner images, one may cascade circuits of the type of Fig. 4, with the output from a first such circuit acting as the input for the next circuit.
The final circuit is then connected to the CCD buffer memory BM
of Fig. 1.
Thus, by predetermining desired si2e variation in image shapes that are to be acceptable, the present invention enables electronically removing or adding pixel signals to the stored image to provide substitute stored fictitious, but acceptable, image information representing a different size of said object shape.
While for purposes of the illustrations previously presen-i ted the illumination of the object was described as from below the x-y table, clearly there are many useful applications for light reflection from above the object, as also described in said copending application. The concept of providing a range of different-di~lensioned acceptable conductive lines or shapes is useful, of course, whether the object is being illuminated by reflection of light or, in the case of the camera negative artwork of the circuit board, or similar transparencies, by transmission of light from behind the artwork.
Returning to the case of artwork, it will hereinafter be shown that placing the artwork in the position of the object in Fig. 1, with back lighting, is most useful. Combinations of front and back lighting are also useful in PCB and other object inspection and registration applications. If lines, yads or other items on the front and back sides are unaligned relative to one another, and the machine has learned a good innerlayer while it was illuminated from behind and now, when inspecting a board, sees an irregular pattern resulting from the shift of .
.52~
the pattern on the front and back side, this previously unseen shifted pattern will be flagged as a defect.
Reflected and scattered lighting may be utilized to yield optimal results when processing PCB's and innerlayers without feed-through holes; and a combination of transmitted and reflected lighting may be incorporated for scanning innerlayers with feed-through holes; and transmitted lighting may be used for processing of artwork.
Transmitting light through the artwork ensures det:ecting defects such as pinholes and hairline cracks which would not be detected using conventional techniques that ref1ect light off a mirror placed behind the artwork. When artwork is placed on a mirror, light passing through a hole reflects off the mirror in a direction away from the hole such that the angle of incidence equals the angle of reflectance, Fig. 6a(1). If the artwork is not perfectly flat, the reflected beam could be blocked by the dark area around ~he hole thereby preventing detection of the defect. For example, if the artwork has a bump which raises it only 10 mils abo~e the mirror (h=10 mils in Fig. 6a (2)) and the angle of light incidence Q equals 70 degrees, then a hole ox break less than 7.28 mils would not be detected.
With the back-lighting method of the invention, FigO 6b, the operation is not affected by small bumps and surface per-2~
turbations, thereby ensuring detection of all deEects, enabllng holes in various orientations along a bumpy section of artwork all to be detected by the light rays that travel through the holes and then directly toward the camera.
The optimal scanning configuration for artwork is there-fore a hollow stage (x-y) with a clear lucite top in which the illuminating source is placed in a stationary position be:Low the table, as in Fig. 1, to provide light rays perpendicular to the surEace. The artwork is placed on the lucite top and suc-tion is applied along at least two or more sides.
For inspecting innerlayers with feedthrough holes, the innerlayers may be illuminated from above and below to elimi-nate the hole from the image, as shown in Fig. 7, eliminating false errors due to perterbations in feedthrough hole position-ing~ Transmitted (back) illumination also permits bacX-to-front side registration to be checked. This is accomplished by increasing the intensity of the transmitted illumination source such that the light passes through the innerlayer lamination but is still blocked by the copper traces on the PCB board or the like. The superimposed front-to-back pattern can be learned and inspected as previously described.
There are problems in dimensional tolerance, shape and position detection that arise particularly in connection with through-board or via holes or the like in conductive pads or PCB's or in similar applications. Artwork and CAD/CAM data bases do not indicate or have via hole positions. Even if a via hole ~ere lndicated perfectly centered within a pad, in the final PCB, in practice, a via hole anywhere within the pad area is entirely acceptable, though deviating in shape and position from the centered hole oE the "good" board. Such should not, therefore, be flagged as "de~ects".
Whereas for acceptable line thinning and thickening, fic-titious "learned" images of lines thicker and thinner than the actually "learned" "good" object lines were created, a somewhat similar philosophy has proven an admirable solution to the via hole problem; i.e. fictitiously making a pad with an acceptable via hole look like a solid pad during the inspection process.
To enable inspection of boards with pads containing via holes (i.e. annular rings) without sacrificing the ability to detect pin holes, defect holes and pads with defective interiors, the method of the invention first uniquely identi-fies annular rings, checks them for proper formation and then disguises them during the inspection process to look like the solid pad of the original artwork. To accomplish this~ it has . ~D
been found desirable to illuminate the PCB simultaneously from both sides; reflecting a constant beam off the top surface~ in Fig. l, and transmitting a coded or otherwise distinctly different beam through the annular ring formed by the via hole in the pad and component holes in the board from the bottom of the board. This is more specifically shown in Fig. 5. The ren-dering of the bottom beam distinctively different from and thus "coded" with respect to the upper reflected beam is shown effected through a light-modulating rotating chopper RC, with the resulting pulsed beam being ~ed by a fiber optic bundle to a linear illumination head below the PCB object (which also serves to reduce heating effects by removing substantial infra--red energy, or other spectral band filtering may also be employed)~ Detection of the coded pattern at the output of the CCD image indicates the presence of a via annular ring or com-ponent hole (by-pass switch S1 open, Fig. 5). The ring of metalization surrounding the coded pattern is then examined for continuity ("annular ring processing"), and if, and on].y if continuity exists, pixels are effectively added to the center fictitiously to ~fill-in~ the entire hole during the inspection process, thus disguising the ring as a solid pad. If contin-uity is not found to exist, the ring is not "filled" and a defect is flagged.
r~ J;~
Further in connection with hole detection and alignment problems, when PCB's are manufactured, they are produced using tooling holes at the perimeter of the board to hold the board during the fabrication process. The holes are used to align the board for drilling, projecting the conductor pattern onto the board and, once completed, to align multilayer boards relative to one another. One is interested in inspecting the locational relationship between the tooling holes, and PC
pattern as well as the relationship between different conductors on the PC pattern. IE either the pattern is shlfted relative to the holes or part of the pattern is shifted rela-tive to another part greater than a certain tolerance, there is an error.
To inspect a board for these purposes in accordance with the invention, one starts off with a known "good" reference board or artwork. The PCB is placed on the x-y scanner table of Fig. 1. At predetermined locations reference images are taken and stored, such as a reference hole at one coordinate position Fig. 8-Al, a pad at another Fig. 8-A2, a diagonal line Fig. 8-A3 at a third, and two intersecting lines Fig. 8-A5 at a ~ourth, etc.
~ ~28-.7To inspect another board to determine whether the board has the circuit conductors, interconnects, holes, or specifi-cally the reference image (typically located at the extreme boundaries of the board) at the proper locations, the board is placed on the x-y table using the tooling holes to carefully register the table and the board. The board is scanned and images Figs. 8-B1 and 8-B5 of the board are taken at the same coordinates of the x-y table as previously used for the reference images.
Since the holes drilled through the board (pictures Bl and B4 Fig. 8) agree with reference pictures Al and A4, the holes in board B are positioned correctly; but the pad and conductor traces images B2, B3 and B5 are shifted to the right by 8 units ;indicating an error in the location of these conductors.
Though there may be correspondence between the reference drilled hole images and x-y location, if the line intersects, rings, etc. are shifted by more than a predetermined tolerance, there will be an indication of error in the locatiorl of these conductors.
Further modifications will also occur to those skilled in this art, including implementation of components and sub-assem-blies of Fig. 1 in a manner similar to that described in said copending application and the systems therein referenced, it ~2 `29 .
!- clearly being understood that the exemplary explanations for PCB's are illustrative only and that the techniques of the invention are readily adaptable to other inspection problems as well, and such are considered to fall within the spirit and scope of the invention as defined in the appended claims.
, .
at A, B and C. The output of the CCD is also delayed one line at LDl and then fed into delay units D, E and F. In addition, the output of the first delay unit LDl is delayed a second line in the line delay LD2, the output of which is applied to unit delays G, H and I, thus creating a three-by-three matrix or blo~k data~ The ~ata arising from each of the delay units A, B, C, D, E, F, G, H and I is applied to corresponding address lines ~bearing the same letters) to the read-only memory ROM.
Th~ contents of the read-only memory ROM is a new computed value with the center element of the three-by-three data block. One can select the proper output from the read-only memory ROM to indicate what the new computed value is; such that one output line 00 may be the data if one wants a thinner line image; or output line 01 if one wants to thicken the image line. If desired, to obtain thicker or thinner images, one may cascade circuits of the type of Fig. 4, with the output from a first such circuit acting as the input for the next circuit.
The final circuit is then connected to the CCD buffer memory BM
of Fig. 1.
Thus, by predetermining desired si2e variation in image shapes that are to be acceptable, the present invention enables electronically removing or adding pixel signals to the stored image to provide substitute stored fictitious, but acceptable, image information representing a different size of said object shape.
While for purposes of the illustrations previously presen-i ted the illumination of the object was described as from below the x-y table, clearly there are many useful applications for light reflection from above the object, as also described in said copending application. The concept of providing a range of different-di~lensioned acceptable conductive lines or shapes is useful, of course, whether the object is being illuminated by reflection of light or, in the case of the camera negative artwork of the circuit board, or similar transparencies, by transmission of light from behind the artwork.
Returning to the case of artwork, it will hereinafter be shown that placing the artwork in the position of the object in Fig. 1, with back lighting, is most useful. Combinations of front and back lighting are also useful in PCB and other object inspection and registration applications. If lines, yads or other items on the front and back sides are unaligned relative to one another, and the machine has learned a good innerlayer while it was illuminated from behind and now, when inspecting a board, sees an irregular pattern resulting from the shift of .
.52~
the pattern on the front and back side, this previously unseen shifted pattern will be flagged as a defect.
Reflected and scattered lighting may be utilized to yield optimal results when processing PCB's and innerlayers without feed-through holes; and a combination of transmitted and reflected lighting may be incorporated for scanning innerlayers with feed-through holes; and transmitted lighting may be used for processing of artwork.
Transmitting light through the artwork ensures det:ecting defects such as pinholes and hairline cracks which would not be detected using conventional techniques that ref1ect light off a mirror placed behind the artwork. When artwork is placed on a mirror, light passing through a hole reflects off the mirror in a direction away from the hole such that the angle of incidence equals the angle of reflectance, Fig. 6a(1). If the artwork is not perfectly flat, the reflected beam could be blocked by the dark area around ~he hole thereby preventing detection of the defect. For example, if the artwork has a bump which raises it only 10 mils abo~e the mirror (h=10 mils in Fig. 6a (2)) and the angle of light incidence Q equals 70 degrees, then a hole ox break less than 7.28 mils would not be detected.
With the back-lighting method of the invention, FigO 6b, the operation is not affected by small bumps and surface per-2~
turbations, thereby ensuring detection of all deEects, enabllng holes in various orientations along a bumpy section of artwork all to be detected by the light rays that travel through the holes and then directly toward the camera.
The optimal scanning configuration for artwork is there-fore a hollow stage (x-y) with a clear lucite top in which the illuminating source is placed in a stationary position be:Low the table, as in Fig. 1, to provide light rays perpendicular to the surEace. The artwork is placed on the lucite top and suc-tion is applied along at least two or more sides.
For inspecting innerlayers with feedthrough holes, the innerlayers may be illuminated from above and below to elimi-nate the hole from the image, as shown in Fig. 7, eliminating false errors due to perterbations in feedthrough hole position-ing~ Transmitted (back) illumination also permits bacX-to-front side registration to be checked. This is accomplished by increasing the intensity of the transmitted illumination source such that the light passes through the innerlayer lamination but is still blocked by the copper traces on the PCB board or the like. The superimposed front-to-back pattern can be learned and inspected as previously described.
There are problems in dimensional tolerance, shape and position detection that arise particularly in connection with through-board or via holes or the like in conductive pads or PCB's or in similar applications. Artwork and CAD/CAM data bases do not indicate or have via hole positions. Even if a via hole ~ere lndicated perfectly centered within a pad, in the final PCB, in practice, a via hole anywhere within the pad area is entirely acceptable, though deviating in shape and position from the centered hole oE the "good" board. Such should not, therefore, be flagged as "de~ects".
Whereas for acceptable line thinning and thickening, fic-titious "learned" images of lines thicker and thinner than the actually "learned" "good" object lines were created, a somewhat similar philosophy has proven an admirable solution to the via hole problem; i.e. fictitiously making a pad with an acceptable via hole look like a solid pad during the inspection process.
To enable inspection of boards with pads containing via holes (i.e. annular rings) without sacrificing the ability to detect pin holes, defect holes and pads with defective interiors, the method of the invention first uniquely identi-fies annular rings, checks them for proper formation and then disguises them during the inspection process to look like the solid pad of the original artwork. To accomplish this~ it has . ~D
been found desirable to illuminate the PCB simultaneously from both sides; reflecting a constant beam off the top surface~ in Fig. l, and transmitting a coded or otherwise distinctly different beam through the annular ring formed by the via hole in the pad and component holes in the board from the bottom of the board. This is more specifically shown in Fig. 5. The ren-dering of the bottom beam distinctively different from and thus "coded" with respect to the upper reflected beam is shown effected through a light-modulating rotating chopper RC, with the resulting pulsed beam being ~ed by a fiber optic bundle to a linear illumination head below the PCB object (which also serves to reduce heating effects by removing substantial infra--red energy, or other spectral band filtering may also be employed)~ Detection of the coded pattern at the output of the CCD image indicates the presence of a via annular ring or com-ponent hole (by-pass switch S1 open, Fig. 5). The ring of metalization surrounding the coded pattern is then examined for continuity ("annular ring processing"), and if, and on].y if continuity exists, pixels are effectively added to the center fictitiously to ~fill-in~ the entire hole during the inspection process, thus disguising the ring as a solid pad. If contin-uity is not found to exist, the ring is not "filled" and a defect is flagged.
r~ J;~
Further in connection with hole detection and alignment problems, when PCB's are manufactured, they are produced using tooling holes at the perimeter of the board to hold the board during the fabrication process. The holes are used to align the board for drilling, projecting the conductor pattern onto the board and, once completed, to align multilayer boards relative to one another. One is interested in inspecting the locational relationship between the tooling holes, and PC
pattern as well as the relationship between different conductors on the PC pattern. IE either the pattern is shlfted relative to the holes or part of the pattern is shifted rela-tive to another part greater than a certain tolerance, there is an error.
To inspect a board for these purposes in accordance with the invention, one starts off with a known "good" reference board or artwork. The PCB is placed on the x-y scanner table of Fig. 1. At predetermined locations reference images are taken and stored, such as a reference hole at one coordinate position Fig. 8-Al, a pad at another Fig. 8-A2, a diagonal line Fig. 8-A3 at a third, and two intersecting lines Fig. 8-A5 at a ~ourth, etc.
~ ~28-.7To inspect another board to determine whether the board has the circuit conductors, interconnects, holes, or specifi-cally the reference image (typically located at the extreme boundaries of the board) at the proper locations, the board is placed on the x-y table using the tooling holes to carefully register the table and the board. The board is scanned and images Figs. 8-B1 and 8-B5 of the board are taken at the same coordinates of the x-y table as previously used for the reference images.
Since the holes drilled through the board (pictures Bl and B4 Fig. 8) agree with reference pictures Al and A4, the holes in board B are positioned correctly; but the pad and conductor traces images B2, B3 and B5 are shifted to the right by 8 units ;indicating an error in the location of these conductors.
Though there may be correspondence between the reference drilled hole images and x-y location, if the line intersects, rings, etc. are shifted by more than a predetermined tolerance, there will be an indication of error in the locatiorl of these conductors.
Further modifications will also occur to those skilled in this art, including implementation of components and sub-assem-blies of Fig. 1 in a manner similar to that described in said copending application and the systems therein referenced, it ~2 `29 .
!- clearly being understood that the exemplary explanations for PCB's are illustrative only and that the techniques of the invention are readily adaptable to other inspection problems as well, and such are considered to fall within the spirit and scope of the invention as defined in the appended claims.
, .
Claims (29)
1. A method of inspection of circuit board conductive shapes and positions wherein digital signal information is stored representing desired shapes to be monitored in future board inspections, the method comprising, origi-nally storing digital signal information representing an image of desired predetermined object shapes to be learned; predetermining at least one of acceptable size or dimension variations in such object shapes as conduc-tor lines, interconnects, patterns and pads, and accep-table holes and hole position variations as in said con-ductor pads; modifying the stored digital signal informa-tion to create a fictitious image of said object shapes to be learned that incorporates the acceptable variations therein; storing the modified digital signal information representing said fictitious stored image; and, during the inspecting of future boards, ignoring said acceptable variations as possible defects by responding to recogni-tion of the same in the said fictitious stored image.
2. A method as claimed in claim 1 and in which the said modi-fying of the originally stored digital signal information as to said size or dimension variations is effected by electronically removing or adding pixel signals to the stored digital signal information to represent a differ-ent size or dimension of the object shape.
3. A method as claimed in claim 1 and in which the said modifying of the originally stored digital signal infor-mation as to holes and hole position within a conductor pad is effected by monitoring the annular nature of the pad to insure that it is an acceptable via hole, and electronically adding pixel signals to the stored digital signal information in effect to fill in the hole to pre-sent a fictitious image of a solid pad.
4. A method as claimed in claim 3 and in which said monitor-ing includes detecting both light reflected from the upper surface of the board and light transmitted through the annular pad from below the board.
5. A method as claimed in claim 4 and in which the light transmitted from below the board is coded to distinguish the same from that reflected from the upper surface of the board.
6. A method of inspection of circuit board conductive shapes and positions wherein digital signal information is stored representing desired shapes to be monitored in future board inspections, the method comprising, origi-nally storing digital signal information representing an image of desired object shapes to be learned at pre-determined coordinate locations; predetermining accep-table position variations in the coordinates of the learned object shapes; inspecting future boards to deter-mine the presence of said learned object shapes; if such presence is determined, determining the coordinate loca-tion thereof; and indicating as a defect any variation in the last-named coordinate location outside the said acceptable position variations.
7. Apparatus for inspection of circuit board conductive shapes and positions wherein digital signal information is stored representing desired shapes to be monitored in future board inspections, the apparatus having, in combi-nation, means for storing digital signal information ori-ginally representing an image of desired predetermined object shapes to be learned; means for predetermining at least one of acceptable size or dimension variations in such object shapes as conductor lines, interconnects, patterns and pads, and acceptable hole and hole position variations as in said conductor pads; means for modifying the stored digital signal information to create a ficti-tious image of said object shapes to be learned that incorporates the acceptable variations therein; means for storing the modified digital signal information represen-ting said fictitious stored image; and means operable during the inspecting of future boards, for ignoring said acceptable variations as possible defects by responding to recognition of the same in the said fictitious stored image.
8. Apparatus as claimed in claim 7 and in which the said means for modifying the originally stored digital signal information as to said size or dimension variations is provided with means for electronically removing or adding pixel signals to the stored digital signal information to represent a different size or dimension of the object shape.
9. Apparatus as claimed in claim 7 and in which the said means for modifying the originally stored digital signal information as to holes and hole position within a conductor pad is provided with means for monitoring the annular nature of the pad to insure that it is an accep-table via hole, and means for electronically adding pixel signals to the stored digital signal information in effect to fill in the hole to present a fictitious image of a solid pad.
10. Apparatus as claimed in claim 9 and in which said means for monitoring includes means for detecting both light reflected from the upper surface of the board and light transmitted through the annular pad from below the board.
11. Apparatus as claimed in claim 10 and in which means is provided for coding the light transmitted from below the board to distinguish the same from that reflected from the upper surface of the board.
12. Apparatus for inspection of circuit board conductive shapes and positions wherein digital signal information is stored representing desired shapes to be monitored in future board inspections, the apparatus having, in com-bination, means for originally storing digital signal in-formation representing an image of desired object shapes to be learned at predetermined coordinate locations;
means for predetermining acceptable position variations in the coordinates of the learned object shapes; means for inspecting future boards to determine the presence of said learned object shapes; means operable if such pre-sence is determined, for determining the coordinate loca-tion thereof; and means for indicating as a defect any variation in the last-named coordinate location outside the said acceptable position variations.
means for predetermining acceptable position variations in the coordinates of the learned object shapes; means for inspecting future boards to determine the presence of said learned object shapes; means operable if such pre-sence is determined, for determining the coordinate loca-tion thereof; and means for indicating as a defect any variation in the last-named coordinate location outside the said acceptable position variations.
13. A method of inspection of circuit board conductive shapes wherein digital signal information is stored representing shapes to be monitored in future board inspections, the method comprising, storing digital signal information representing an image of a predetermined object shape to be learned; predetermining size variations in said shape that are acceptable to the inspection; and electronically removing or adding pixel signals to the stored image information to provide substitute stored image informa-tion representing a different size of said object shape.
14. An apparatus for real-time high-speed inspection of ob-jects with the aid of image sensors, CAD/CAM image signal generators and the like, having, in combination, means for generating signal images in the form of pixels of an object at one or more magnifications; means for quantiz-ing the pixels of the images into a minimum number of light levels or colors required to characterize the object; means for storing the quantized pixels to create a two-dimensional stored image equal to the largest desired field of view; means for selecting predetermined desired fields of view and magnification from said two-dimensional stored image; means for dividing each such selected field of view into N2 elements; means for sett-ing the brightness value of each element substantially equal to the average brightness value of the pixels con-tained within the element; means for quantizing each such element brightness value into a minimum number of threshold levels required to recognize patterns of interest; means for applying each N2 quantized pixel group at each magnification as a pattern of elements to a corresponding recognition memory, with each pattern of elements serving as an address to said memory; means for entering information into memory address locations in order to teach the apparatus properties including shapes of known objects and characteristics thereof; means for thereafter recognizing such previously taught information as to stored objects and their shapes and other charac-teristics by means for reading information in each memory location accessed by a pattern of elements; and means for monitoring such information to characterize the object;
and the improvement of means for electronically removing or adding pixel signals to the said memory location to store image information representing one or more differ-ent sizes of said object shape which are predetermined to be acceptable to characterize the object.
and the improvement of means for electronically removing or adding pixel signals to the said memory location to store image information representing one or more differ-ent sizes of said object shape which are predetermined to be acceptable to characterize the object.
15. An apparatus as claimed in claim 14, and which the said means for electronically removing or adding pixel sig-nals comprises delay line means connected to receive the said signal images and to delay units connected to the delay line means and fed to the address line-inputs of read only memory means to create a matrix of delayed pixel data, and means for outputting from the read only memory new computed values representing the removal or adding of pixels at the boundary edge of the stored image.
16. An apparatus for real-time high-speed inspection of objects with the aid of image sensors, CAD/CAM image sig-nal generators and the like, having, in combination, means for generating signal images in the form of pixels of an object at one or more magnifications; means for quantizing the pixels of the images into a minimum number of light levels or colors required to characterize the object; means for storing the quantized pixels to create a two-dimensional stored image equal to the largest desired field of view; means for selecting predetermined desired fields of view and magnification from said two-dimensional stored image; means for dividing each such selected field of view into N2 elements; means for setting the brightness value of each element substan-tially equal to the average brightness value of the pixels contained within the element; means for quantizing each such element brightness value into a minimum number of threshold levels required to recognize patterns of in-terest; means for applying each N2 quantized pixel group at each magnification as a pattern of elements to a con-version to digital signal information thereof.
17. A method as claimed in claim 13 and in which the digital signal information is derived from CAD/CAM descriptions of artwork of the circuit board.
18. A method of inspection of circuit board conductor shapes wherein digital signal information is stored representing shapes to be monitored in future board inspections, the method comprising, storing digital signal information re-presenting an image of a predetermined object shape to be learned; predetermining size variations in said shape that are acceptable to the inspection; and electronically removing or adding pixel signals to the stored image in-formation to provide substitute stored image information representing a different size of said object shape.
19. A method as claimed in claim 18 and in which the further steps are performed of scanning further boards to be in-spected and detecting signal information at the top of said board corresponding to the object shapes on the board, and recognizing the predetermined shapes within the limits of the stored said different size.
20. A method as claimed in claim 18 and in which said object shape comprises a linear strip and the said electroni-cally removing pixel step provides stored image informa-tion of a thinner linear strip acceptable to the inspec-tion process.
21. A method as claimed in claim 18 and in which said object shape is of a curved form and the said electronically adding pixel step provides stored image information of a larger curved form acceptable to the inspection process.
22. A method as claimed in claim 21 and in which said objects comprise discs or pads, one disposed on each side of a translucent or light transmitting surface in substantial vertical alignment, and the further step is performed of generating a strip of substantially uniform-intensity light beneath said surface, removing infra-red or other spectral energy from said light, and thereafter directing the same through said surface from a position adjacent the rear side of said surface; said electronically adding pixel step providing stored image information of a larger disc or pad corresponding to acceptable variation in vertical mis-alignment of the discs of pads on oppo-site sides of said surface.
23. A method as claimed in claim 22 and in which said discs or pads are conductive pads and said translucent surface is a circuit board mounting said pads.
24. A method of inspection of object shapes on light-transmit-ting surfaces and the like, wherein digital signal infor-mation is stored representing shapes to be monitored in future board inspections, the method comprising, generat-ing a strip of substantially uniform-intensity light beneath said surface, removing infra-red energy from said light, and thereafter directing the same through said surface from a position adjacent the rear side of said surface; scanning the surface by said light strip and detecting signal information at the top of said surface corresponding to the object shapes on the surface; and storing digital signal information representing an image of a predetermined object shape to be learned, for future recognition in scanning inspection of subsequent sur-faces.
25. A method as claimed in claim 24 and in which the light strip may be re-directed from above said surface in close proximity to the top of said surface to illuminate the surface during scanning along the top of said surface.
26. A method as claimed in claim 24 and in which said object shapes are light-opaque artwork and said light-transmitt-ing surface are substantially transparent surfaces bear-ing the artwork.
27. A method as claimed in claim 24 and in which said object shapes are light opaque conductive elements and said light-transmitting surfaces are translucent circuit boards mounting said elements.
28. A method as claimed in claim 27 and in which said conduc-tive elements comprise discs or pads mounted on opposite sides of said circuit boards, the vertical alignment of which is detectable through the rear side illumination of the boards.
29. A method of inspection of conductor object shapes trans-lucent on circuit boards and the like, wherein digital signal information is stored representing shapes to be monitored in future board inspections, the method com-prising, generating a strip of substantially uniform-in-tensity light beneath said circuit board, removing infra -red or other spectral energy from said light, thereafter directing the same through said circuit board from a position adjacent the rear side of said board; scanning the board by said light strip and detecting signal information corresponding to the object shapes on the board; and storing digital signal information representing an image of a predetermined object shape to be learned, for subsequent recognition in scanning inspection of subsequent boards.
--30. Apparatus as claimed in claim 12 and in which means is provided responsive to the means for indicating defects for producing pictures of the indicated defects accompanied by a recordal of said coordinate board locations thereof.----31. Apparatus as claimed in claim 30 and in which means is provided including an x-y coordinate table for employing said pictures to locate actual defects.----32. Apparatus for inspection of circuit board conductive patterns and positions wherein digital signal information is stored representing desired patterns to be monitored in future board inspections, the apparatus having, in combination, means for storing digital signal information representing desired patterns; means for inspecting future boards to determine the presence of differences from said desired patterns; means operable if such presence is determined for determining the x-y coordinate location of the same and for indicating the same as a defect;
and means responsive to the last-named means for producing pictures of the indicated defects accompanied by a recordal of said x-y coordinate board locations.----33. Apparatus as claimed in claim 32 and in which means is provided including an x-y coordinate table for employing said pictures to locate actual defects.--
--30. Apparatus as claimed in claim 12 and in which means is provided responsive to the means for indicating defects for producing pictures of the indicated defects accompanied by a recordal of said coordinate board locations thereof.----31. Apparatus as claimed in claim 30 and in which means is provided including an x-y coordinate table for employing said pictures to locate actual defects.----32. Apparatus for inspection of circuit board conductive patterns and positions wherein digital signal information is stored representing desired patterns to be monitored in future board inspections, the apparatus having, in combination, means for storing digital signal information representing desired patterns; means for inspecting future boards to determine the presence of differences from said desired patterns; means operable if such presence is determined for determining the x-y coordinate location of the same and for indicating the same as a defect;
and means responsive to the last-named means for producing pictures of the indicated defects accompanied by a recordal of said x-y coordinate board locations.----33. Apparatus as claimed in claim 32 and in which means is provided including an x-y coordinate table for employing said pictures to locate actual defects.--
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| US71199585A | 1985-03-14 | 1985-03-14 | |
| US711,995 | 1985-03-14 |
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| CA000504151A Expired CA1252216A (en) | 1985-03-14 | 1986-03-14 | Apparatus for automatically inspecting objects and identifying or recognizing known and unknown portions thereof, including defects and the like and method |
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| EP (1) | EP0195161B1 (en) |
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Families Citing this family (88)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5151822A (en) * | 1986-10-17 | 1992-09-29 | E. I. Du Pont De Nemours And Company | Transform digital/optical processing system including wedge/ring accumulator |
| JP2510687B2 (en) * | 1987-08-13 | 1996-06-26 | 日本電信電話株式会社 | High-speed defect detection method and device |
| US5046111A (en) * | 1989-02-09 | 1991-09-03 | Philip Morris Incorporated | Methods and apparatus for optically determining the acceptability of products |
| GB2228567A (en) * | 1989-02-28 | 1990-08-29 | David Thomas Walters | Intelligent inspection system |
| JPH03210679A (en) * | 1990-01-12 | 1991-09-13 | Hiyuutec:Kk | Method and device for pattern matching |
| US5243665A (en) * | 1990-03-07 | 1993-09-07 | Fmc Corporation | Component surface distortion evaluation apparatus and method |
| DE4014661C2 (en) * | 1990-05-08 | 1996-03-28 | Groz & Soehne Theodor | Optical control of knitting needles on knitting machines |
| US5197105A (en) * | 1990-05-30 | 1993-03-23 | Dainippon Screen Mfg. Co. Ltd. | Method of reading optical image of inspected surface and image reading system employabale therein |
| US5129009A (en) * | 1990-06-04 | 1992-07-07 | Motorola, Inc. | Method for automatic semiconductor wafer inspection |
| US5202932A (en) * | 1990-06-08 | 1993-04-13 | Catawa Pty. Ltd. | X-ray generating apparatus and associated method |
| JPH0786466B2 (en) * | 1990-07-18 | 1995-09-20 | 大日本スクリーン製造株式会社 | Printed circuit board pattern inspection device |
| US5184217A (en) * | 1990-08-02 | 1993-02-02 | Doering John W | System for automatically inspecting a flat sheet part |
| US5020123A (en) * | 1990-08-03 | 1991-05-28 | At&T Bell Laboratories | Apparatus and method for image area identification |
| JP2591292B2 (en) * | 1990-09-05 | 1997-03-19 | 日本電気株式会社 | Image processing device and automatic optical inspection device using it |
| US5214712A (en) * | 1990-09-11 | 1993-05-25 | Matsushita Electric Industrial Co., Ltd. | Pattern inspection system for inspecting defect of land pattern for through-hole on printed board |
| US5121441A (en) * | 1990-09-21 | 1992-06-09 | International Business Machines Corporation | Robust prototype establishment in an on-line handwriting recognition system |
| JPH0723847B2 (en) * | 1990-10-30 | 1995-03-15 | 大日本スクリーン製造株式会社 | Printed circuit board pattern inspection method |
| GB2249690B (en) * | 1990-11-07 | 1994-07-06 | Gec Ferranti Defence Syst | Security system |
| JPH0820214B2 (en) * | 1990-11-27 | 1996-03-04 | 大日本スクリーン製造株式会社 | Printed circuit board line width inspection method |
| US5598345A (en) * | 1990-11-29 | 1997-01-28 | Matsushita Electric Industrial Co., Ltd. | Method and apparatus for inspecting solder portions |
| US5198878A (en) * | 1990-11-30 | 1993-03-30 | International Business Machines Corporation | Substrate machining verifier |
| US5119434A (en) * | 1990-12-31 | 1992-06-02 | Beltronics, Inc. | Method of and apparatus for geometric pattern inspection employing intelligent imaged-pattern shrinking, expanding and processing to identify predetermined features and tolerances |
| US5237621A (en) * | 1991-08-08 | 1993-08-17 | Philip Morris Incorporated | Product appearance inspection methods and apparatus employing low variance filter |
| US10361802B1 (en) | 1999-02-01 | 2019-07-23 | Blanding Hovenweep, Llc | Adaptive pattern recognition based control system and method |
| US6418424B1 (en) | 1991-12-23 | 2002-07-09 | Steven M. Hoffberg | Ergonomic man-machine interface incorporating adaptive pattern recognition based control system |
| US8352400B2 (en) | 1991-12-23 | 2013-01-08 | Hoffberg Steven M | Adaptive pattern recognition based controller apparatus and method and human-factored interface therefore |
| US6850252B1 (en) * | 1999-10-05 | 2005-02-01 | Steven M. Hoffberg | Intelligent electronic appliance system and method |
| US6400996B1 (en) | 1999-02-01 | 2002-06-04 | Steven M. Hoffberg | Adaptive pattern recognition based control system and method |
| US5903454A (en) | 1991-12-23 | 1999-05-11 | Hoffberg; Linda Irene | Human-factored interface corporating adaptive pattern recognition based controller apparatus |
| JPH05189571A (en) * | 1992-01-13 | 1993-07-30 | Nikon Corp | Method and device for pattern matching |
| US5319722A (en) * | 1992-10-01 | 1994-06-07 | Sony Electronics, Inc. | Neural network for character recognition of rotated characters |
| US5742702A (en) * | 1992-10-01 | 1998-04-21 | Sony Corporation | Neural network for character recognition and verification |
| US5307421A (en) * | 1992-10-14 | 1994-04-26 | Commissariat A L'energie Atomique | Process for producing a synthesized reference image for the inspection of objects and apparatus for performing the same |
| EP0594146B1 (en) * | 1992-10-22 | 2002-01-09 | Advanced Interconnection Technology, Inc. | System for automatic optical inspection of wire scribed circuit boards |
| US5365596A (en) * | 1992-12-17 | 1994-11-15 | Philip Morris Incorporated | Methods and apparatus for automatic image inspection of continuously moving objects |
| US5305392A (en) * | 1993-01-11 | 1994-04-19 | Philip Morris Incorporated | High speed, high resolution web inspection system |
| JPH06348800A (en) * | 1993-06-02 | 1994-12-22 | Canon Inc | Method and device for image processing |
| JP3243894B2 (en) * | 1993-06-04 | 2002-01-07 | オムロン株式会社 | Shading image processing device |
| JPH07239938A (en) * | 1994-02-28 | 1995-09-12 | Matsushita Electric Ind Co Ltd | Inspection method |
| US5822208A (en) * | 1994-04-12 | 1998-10-13 | Bay Instrumentation & Technology Co. | Method and apparatus for predicting errors in a manufacturing process |
| JP3515199B2 (en) * | 1995-01-06 | 2004-04-05 | 大日本スクリーン製造株式会社 | Defect inspection equipment |
| GB2307547B (en) * | 1995-11-22 | 2000-02-16 | Europ Gas Turbines Ltd | A method of detecting manufacturing errors in an article |
| US5895910A (en) * | 1996-04-11 | 1999-04-20 | Fmc Corporation | Electro-optic apparatus for imaging objects |
| US5805290A (en) | 1996-05-02 | 1998-09-08 | International Business Machines Corporation | Method of optical metrology of unresolved pattern arrays |
| US5795688A (en) * | 1996-08-14 | 1998-08-18 | Micron Technology, Inc. | Process for detecting defects in photomasks through aerial image comparisons |
| US5731877A (en) * | 1996-10-08 | 1998-03-24 | International Business Machines Corporation | Automated system utilizing self-labeled target by pitch encoding |
| JPH10141929A (en) * | 1996-11-12 | 1998-05-29 | Hitachi Ltd | Soldering inspection device |
| US5760893A (en) * | 1996-12-24 | 1998-06-02 | Teradyne, Inc. | Method and apparatus for inspecting component placement and solder connection in printed circuit board manufacture |
| US5976740A (en) * | 1997-08-28 | 1999-11-02 | International Business Machines Corporation | Process for controlling exposure dose or focus parameters using tone reversing pattern |
| US5965309A (en) * | 1997-08-28 | 1999-10-12 | International Business Machines Corporation | Focus or exposure dose parameter control system using tone reversing patterns |
| US5953128A (en) * | 1997-08-28 | 1999-09-14 | International Business Machines Corporation | Optically measurable serpentine edge tone reversed targets |
| US5914784A (en) * | 1997-09-30 | 1999-06-22 | International Business Machines Corporation | Measurement method for linewidth metrology |
| US6658145B1 (en) * | 1997-12-31 | 2003-12-02 | Cognex Corporation | Fast high-accuracy multi-dimensional pattern inspection |
| US6175645B1 (en) * | 1998-01-22 | 2001-01-16 | Applied Materials, Inc. | Optical inspection method and apparatus |
| US7016539B1 (en) | 1998-07-13 | 2006-03-21 | Cognex Corporation | Method for fast, robust, multi-dimensional pattern recognition |
| US6137578A (en) * | 1998-07-28 | 2000-10-24 | International Business Machines Corporation | Segmented bar-in-bar target |
| US6128089A (en) * | 1998-07-28 | 2000-10-03 | International Business Machines Corporation | Combined segmented and nonsegmented bar-in-bar targets |
| JP3283836B2 (en) * | 1998-08-31 | 2002-05-20 | 日本電気株式会社 | Image alignment method for reticle appearance inspection device |
| JP2000112112A (en) * | 1998-10-05 | 2000-04-21 | Mitsubishi Electric Corp | Definition certification method for pattern graphic and semiconductor pattern forming method |
| US7966078B2 (en) | 1999-02-01 | 2011-06-21 | Steven Hoffberg | Network media appliance system and method |
| IL133313A (en) * | 1999-12-05 | 2004-12-15 | Orbotech Ltd | Adaptive tolerance reference inspection system |
| CA2296143A1 (en) * | 2000-01-18 | 2001-07-18 | 9071 9410 Quebec Inc. | Optical inspection system |
| CN1302280C (en) * | 2000-04-27 | 2007-02-28 | 精工爱普生株式会社 | Inspection method for foreign matters inside through hole |
| JP2002358509A (en) * | 2001-06-01 | 2002-12-13 | Dainippon Screen Mfg Co Ltd | Device for inspecting hole |
| US6700658B2 (en) | 2001-10-05 | 2004-03-02 | Electro Scientific Industries, Inc. | Method and apparatus for circuit pattern inspection |
| US6788406B2 (en) * | 2001-11-02 | 2004-09-07 | Delaware Capital Formation, Inc. | Device and methods of inspecting soldered connections |
| US8588511B2 (en) * | 2002-05-22 | 2013-11-19 | Cognex Corporation | Method and apparatus for automatic measurement of pad geometry and inspection thereof |
| JP2004170329A (en) * | 2002-11-22 | 2004-06-17 | Nippon Steel Corp | Bump electrode and ball inspection method for the same |
| US8081820B2 (en) * | 2003-07-22 | 2011-12-20 | Cognex Technology And Investment Corporation | Method for partitioning a pattern into optimized sub-patterns |
| US7190834B2 (en) * | 2003-07-22 | 2007-03-13 | Cognex Technology And Investment Corporation | Methods for finding and characterizing a deformed pattern in an image |
| US20050190959A1 (en) * | 2004-02-26 | 2005-09-01 | Kohler James P. | Drill hole inspection method for printed circuit board fabrication |
| GB2417073A (en) * | 2004-08-13 | 2006-02-15 | Mv Res Ltd | A machine vision analysis system and method |
| US7921628B2 (en) | 2004-09-14 | 2011-04-12 | Westside Equipment Company | Small scale tomato harvester |
| US7694502B2 (en) | 2004-09-14 | 2010-04-13 | Westside Equipment Co. | Small scale tomato harvester |
| US7581375B2 (en) * | 2004-09-14 | 2009-09-01 | Westside Equipment Co. | Small scale tomato harvester |
| US8437502B1 (en) | 2004-09-25 | 2013-05-07 | Cognex Technology And Investment Corporation | General pose refinement and tracking tool |
| US7263451B1 (en) * | 2004-10-25 | 2007-08-28 | Advanced Micro Devices, Inc. | Method and apparatus for correlating semiconductor process data with known prior process data |
| CN100416581C (en) * | 2006-04-13 | 2008-09-03 | 华为技术有限公司 | Method and device for automatically adjusting Fanout design line width |
| ITPI20060067A1 (en) * | 2006-06-06 | 2007-12-07 | Examina Spa | SYSTEM FOR CHECKING THE BEVEL OF A PIANO OBJECT |
| CN1869667B (en) * | 2006-06-08 | 2010-07-28 | 浙江欧威科技有限公司 | Profile analyzing method for investigating defect of printed circuit board |
| US8103085B1 (en) | 2007-09-25 | 2012-01-24 | Cognex Corporation | System and method for detecting flaws in objects using machine vision |
| CN101646308B (en) * | 2008-08-05 | 2011-09-21 | 富葵精密组件(深圳)有限公司 | Circuit compensation system of circuit board and method for circuit compensation thereby |
| EP2339541A1 (en) * | 2009-12-23 | 2011-06-29 | Fujitsu Limited | A computer-implemented method of geometric feature detection and modification |
| US9147014B2 (en) | 2011-08-31 | 2015-09-29 | Woodtech Measurement Solutions | System and method for image selection of bundled objects |
| DE102013211403B4 (en) * | 2013-06-18 | 2020-12-17 | Carl Zeiss Smt Gmbh | Method and device for the automated determination of a reference point of an alignment mark on a substrate of a photolithographic mask |
| US9679224B2 (en) | 2013-06-28 | 2017-06-13 | Cognex Corporation | Semi-supervised method for training multiple pattern recognition and registration tool models |
| JP6635763B2 (en) * | 2015-11-16 | 2020-01-29 | キヤノンメディカルシステムズ株式会社 | Image processing apparatus and image processing program |
| CN110334433B (en) * | 2019-07-03 | 2022-03-15 | 电子科技大学 | Automatic generation method for PCB (printed circuit board) packaging file |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| NL7409850A (en) * | 1974-07-22 | 1976-01-26 | Philips Nv | METHOD AND DEVICE FOR TESTING A TWO-DIMENSIONAL PATTERN. |
| US3987412A (en) * | 1975-01-27 | 1976-10-19 | International Business Machines Corporation | Method and apparatus for image data compression utilizing boundary following of the exterior and interior borders of objects |
| US4003024A (en) * | 1975-10-14 | 1977-01-11 | Rockwell International Corporation | Two-dimensional binary data enhancement system |
| JPS55142254A (en) * | 1979-04-25 | 1980-11-06 | Hitachi Ltd | Inspecting method for pattern of printed wiring board |
| US4450579A (en) * | 1980-06-10 | 1984-05-22 | Fujitsu Limited | Recognition method and apparatus |
| DE3070433D1 (en) * | 1980-12-18 | 1985-05-09 | Ibm | Method for the inspection and automatic sorting of objects with configurations of fixed dimensional tolerances, and device for carrying out the method |
| JPS5832147A (en) * | 1981-08-20 | 1983-02-25 | Fujitsu Ltd | Inspecting method for reticle |
| JPS5867093A (en) * | 1981-10-19 | 1983-04-21 | 株式会社東芝 | Method and device for inspecting printed circuit board |
| GB2129546B (en) * | 1982-11-02 | 1985-09-25 | Cambridge Instr Ltd | Image comparison |
| US4560273A (en) * | 1982-11-30 | 1985-12-24 | Fujitsu Limited | Method and apparatus for inspecting plated through holes in printed circuit boards |
| US4589140A (en) * | 1983-03-21 | 1986-05-13 | Beltronics, Inc. | Method of and apparatus for real-time high-speed inspection of objects for identifying or recognizing known and unknown portions thereof, including defects and the like |
| US4556903A (en) * | 1983-12-20 | 1985-12-03 | At&T Technologies, Inc. | Inspection scanning system |
| US4648053A (en) * | 1984-10-30 | 1987-03-03 | Kollmorgen Technologies, Corp. | High speed optical inspection system |
-
1985
- 1985-10-30 EP EP85307843A patent/EP0195161B1/en not_active Expired - Lifetime
- 1985-10-30 DE DE85307843T patent/DE3587582D1/en not_active Expired - Lifetime
-
1986
- 1986-01-23 CN CN86100704.2A patent/CN1007380B/en not_active Expired
- 1986-03-14 CA CA000504151A patent/CA1252216A/en not_active Expired
-
1987
- 1987-09-02 US US07/093,114 patent/US4893346A/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| EP0195161A2 (en) | 1986-09-24 |
| DE3587582D1 (en) | 1993-10-21 |
| US4893346A (en) | 1990-01-09 |
| EP0195161B1 (en) | 1993-09-15 |
| CN86100704A (en) | 1986-09-10 |
| EP0195161A3 (en) | 1988-08-10 |
| CN1007380B (en) | 1990-03-28 |
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