CA1227586A - Call progress for a computer telephone interface - Google Patents

Abstract

ABSTRACT OF THE DISCLOSURE
A call progress monitor for a computer telephone interface system. Energy detectors are connected to receive signals from a telephone line. A bandpass filter is connected to the telephone line, having selectable center frequency. A
counter-timer connected to count clock pulses is reset by the energy detector and timing commences in response to the presence of a signal on the telephone line. The counter will result in a center frequency control means for the filter being slewed over a bandwidth of interest, in synchronism with the counting of the timer-counter. A signal detector connected to the filter indicates the presence of a pair of signal tones passing through the filter as it is slewed.
Decoding means are connected to the counter-timer and the signal detector for generating a binary signal indicating the frequency of the bandpass filter which passes each signal tone. The binary signal is entered in a data register, and an interrupt posted to a host computer. During the remaining portion of a counting cycle, a cadence interval is detected and the data register is loaded with cadence data. An interrupt is posted at the end of the cadence measuring interval for signalling the computer to read the contents of the data register.

Description

~758~

2 COMPUTER TELEPHONE INTERFACE

3 The present invention relates to the communicating computer

4 art. Specifically, a call progress monitor is provided for determining signal activity on a telephone line, and 6 providing the identity of that activity to a connected 7 computer.

8 Communicating by computer over stàndard telephone lines 9 requires an ability to reliably determine the condition of 10 the telephone line before initiating transmission. The 11 telephone line may at any time prior to transmission exhibit 12 any one ox several conditions including a busy signal, 13 ringing signal and a dial tone signal. Additionally, the l telephone line may exhibit a fault condition where no signal 15 energy may be present on the lille. Except for the condition 16 of the dial tone signal, seizing the telephone line and 17 communicating by computer under these conditions will not be 18 possible.

19 Prior art communicating computer systems utilize a call 20 progress monitor to determine these line conditions.
21 Additionally, circuitry is required to identify answer back 22 tones which may be present on the telephone line identifying 23 the transmission format of a called modem.
-24 Call progress monitoring has typically been accomplished25 through cadence timing. Cadence timing senses the presence 26 of signal energy on the line, and measures the duration of 27 that signal energy to determine the line condition. Cadence 28 timing, however, is subject to some disadvantages. Included 29 among these disadvantages is a minimum time of a second to check cadence timing, and an error rate which may, because of 31 a high noise condition on the telephone-line, exceed 40 to 32 50~.

~L2Z758~i ~984-005 2 1 Summary of the Invention 2 It is an object of this invention to provide call progress 3 monitoring for a communicating computer.

4 It is a more specific object of this invention to provide for call progress monitoring of a telephone line with improved 6 reliability.

7 These and other objects are accomplished by a call progress 8 monitor in accordance with the invention. The monitoring of 9 telephone signal conditions is accomplished with apparatus which measures the frequency of signals on the telephone 11 line, as well as the cadence of said signals. The frequency 12 measurement is accomplished by initiating scanning of a 13 bandpass filter upon detection oE signal energy on the line.
14 The bandpass filter center frequency will be shifted over a frequency bandwidth which includes the frequencies of the 16 usual signals on the line.

17 Additional to frequency measurement of telephone line signal 18 conditions, cadence timing of the signals is also provided.
19 The cadence timing is initiated with the detection of signal energy on the line.

21 In a preferred embodiment of the invention, a counter is 22 enabled by the communicating computer to count clock pulses.
23 Upon the~indication of signal energy on toe line the counter 24 is reset. The counter, during a first portion of its counting cycle after being reset, effects frequency slewing 26 of a bandpass filter. Energy from the filter is dejected 27 during slewing, thus identifying the signal frequencies on 28 the telephone line. Cadence timing is effected by decoding 29 the output of the counter during a subsequent portion of the counting interval when the signal line energy is interrupted.

31 The identified signal frequencies of the detected signal 32 energy ls loaded into a register. An interrupt posted at the ~22751~i 1 end of the first portion of the counting cycle will result in 2 the communicating computer reading the register, whereby the 3 signal conditions on the telephone line are determined.

4 Following loading of the frequency data, the cadence timing is loaded in the register. Another interrupt is posted, 6 permitting the cadence data to be read by the computer.

7 In the event of a DEAD LINE condition, the counter is never 8 reset and will eventually reach a maximum count. This 9 condition is detected and data is loaded in the register, indicting a DEAD LINE condition. DIAL TONE, which has no 11 cadence, is determined by detecting only one reset of the 12 interval timer which occurs within a prescribed time 13 interval. Data indicating DIAL TONE is then loaded in the 14 register Subsequent interrupts will be initiated to permit either the ~IALTONE or DEAD LINE condition to be read by the 16 computer.

17 The preferred embodiment also permits ANSWERTONE analysis. A
18 mode command from the computer will inhibit cadence timing l9 and select an ANSWERTONE frequency bandwidth over which the filter is slewed. The frequency of detected signal energy 21 lying within the slewed bandwidth will be decoded and stored 22 in the register. An IRQ command issued after slewing will 23 result in the computer reading the register contents ~4 identifying the frequency of a received ANSWERTONE.

Description of the Figures 26 Figure 1 is an overall block diagram of a communicating 27 computer terminal.

28 Figure 2 is a schematic drawing of a filter, filter detector 29 and energy detector for the call progress monitor.

Figure 3 is a schematic diagram of the processor and timing 31 circuit of the call progress monitor.

1 Figure 4 is a schematic diagram of the filter frequency 2 control circuit of Figure 2.

3 Description of Preferred Embodiment 4 Referring now to Figure 1, there is generally shown a block diagram of a communicating computer system A computer, 6 identified as CPU 12, is connected via a modem 13 to a 7 telephone line 11. I.n addition to the CPU is a telephone 17 8 which permits the communicating computer facility to use both 9 voice communication as well as data communication. Further, the dialer 16 will initiate contact with a called party.

11 A call progress monitor 14 is shown in Figure 1 which will 12 monitor conditions on the telephone line 11. Prior to 13 connecting the CPU 12 to the telephone line, it is required 14 to determine whether or not the line is not otherwise occupied and unavailable for service The conditions on the 16 telephone line 11 which preclude use include a dead line 17 (non-functioning telephone line), a busy signal, or a ringing 18 signal. Additional to these conditions is a standard vial 19 tone condition which must be determined to exist on the telephone line 11 before connecting the CPU 12 to telephone 21 line 11.

22 Additional. to determining the line conditions under normal 23 telephone communication usage, the CPM 14 is configured to 24 detect ANSWERBAC~ tones when CPU 12 has obtained access to telephone line 11.

26 The call progress monitor, CPM 14, is operated under control 27 of a command register 15. Command register 15 will apply 28 three (3) control signals to the CP~ 14 comprising CP MODE, 29 CPCTL and CPSEL. The CPM 14 puts out an interrupt signal, IRQ, when one of the telephone line signal conditions have 31 been detected on the telephone line 11. The IRQ signal is 32 routed to the CPU 12 to indicate one or more condition has 33 been detected.

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1 The CP MODE line will, in response to a command from the CPU
2 12, establish the CPM 14 in the ANSWER TONE detect mode or in 3 the CALL PROGRESS MODE. As such, the CPM 14 will be enabled 4 to detect energy appearing on the telephone line 11, and determine the frequency and cadence of the energy which lies 6 between 350 ~z. and 620 Hz. for a call progress monitor mode, 7 and the frequency of signals between 2 and 2.4 kHz. in an 8 ANSWERTONE mode.

9 The CPCTL line is an enable line to the call progress monitor 14 which will enable the call progress monitor 14 when the ll CPU 12 calls for the monitoring function 12 When the CPM 14 is operable in the call progress mode, 13 frequency scanning commences upon the detection of any energy 14 on telephone line 11. The frequency scanning will occur between 350 Liz. and 620 Hz. in four (4) discrete frequency 16 bands. A detection of energy in any one of the discrete 17 energy bands will be identified and loaded in a register 14a 18 internal to CPM 14. The normal telephone line energy is 19 comprised of a pair of signal tones of different frequencies which lie in clifferent frequency bands.At the same time such 21 energy is detected, an interrupt command, IRQ, is issued to 22 the CPU 12. CPU 12 will then address the command register 15 23 and hold the CPSEL line in a logic l state. The CPSEL
24 control line in the logic 1 state will dump the contents of the CPM 14 register 14a onto the bus ~8 where it can be 26 routed to the CPU 12. Thus, during frequency scanning in the 27 CPM mode, the telephone line 11 energy is sampled at these 28 four (4) frequencies of interest, and the output register of 29 CPM 14 records the frequencies of a pair of detected signal tones. The reyister then dumps its contents in response to 31 the CPSEL command for the CPU 12 to identify the telephone 32 line activity.

33 Addi-tionaI to the frequency scanning and detection of CPM 14, 34 CPM 14 provides for cadence timing of the detected telephone ~.Z~7S~6 l line siynal energy. Following the frequency scanning 2 function, the register 14a of CPM 14 will be loaded with data 3 which indicates the cadence of energy detected on the 4 telephone line 11. At the time of cadence detection, another IRQ signal will be initiated, whereby CPU 12 may call for the 6 contents of the CPM register 14a, thus, identifying the 7 cadence of telephone line 11 energy.

8 Associated with the detection of the cadence for signal 9 energy detected on telephone line 11, the register of CPM 14 will indicate the presence of a dead line, i.e., where no ll energy is detected, indicating the absence of dial tone.
12 This condition as well, once loaded in the output register 13 14a ox CPM 14, will initiate an interrupt and be read into 14 the CPU 12.

The command register 15 will, in response to the co~nand 16 initiated by CPU 12, change the mode from a call progress 17 mode to an ANSWERTONE mode. With the call progress mode set 18 to 1, and the CPCTL set to 1, no cadence timing is provided l9 by the CPM 14. CPM 14 will, however, frequency scan over an ANSWERTONE bandwidth any detected energy on telephone line 21 11. The detection of energy on telephone line 11 will 22 initiate an IRQ. The IRQ will, in the ANSWERTONE mode, 23 result in CPU 12 raising, through command register 15, the 24 CPSEL line to a logic 0 state, thus reading out the contents of CPM register 14a. CPM register 14a will have been loaded 26 with data identifying any detected energy lying within one of 27 the discrete frequency bands between 2 and 2.4 k~Iz. This 28 frequency band is likewise divided into four (4) bandwidths, 29 the four (4) bandwidths indlcating an ANSWERTONE. Thus, the CPM reyister 14a of CPM 14 will deliver data identifying the 31 bandwidth between 2 and 2.4 kHz containing the detected 32 energy.

33 The CPM 14, which is the subject of the present invention, is 34 shown in one embodiment in Figures 2, 3 and 4. Referring to ~7~86 1 Figure 2, there is shown a programmable bandpass filter 2 structure 20. The programmable bandpass filter structure 20 3 receives energy from the telephone line 11. The programmable 4 bandpass filter structure 20 is implemented from a switched capacitor filter 21, such as the National Semiconductor MS 10 6 Universal~Monolithic Dual Switch Capacitor Filter. Referring 7 to the National Semiconductor application notes of this 8 device, it is clear that a clock input signal applied to 9 terminal 10 thereof will control the center frequency of the bandpass filter structure. Additional frequency control is 11 provided by a filter select signal which will permit 12 frequency scanning of two separate bandwidths of interest, 13 the ANSWERTONE bandwidth and CPM monitor bandwidth. Power 14 supply connect.ions of ~5 volts and a common connection as well as a -5 volt connection are also provided to the device.

16 The bandpass filter structure includes first and second 17 filter sections. The first bandpass filter section has a 18 nominal Q of 10 and a gain of 20 DB. The gain of 20 DB and Q
19 of 10 provide an output level oi the first section within the maximum voltage swing oE the output amplifier of the switched 21 capacitor filter 21. The second section of MF 10 device 22 includes a limiter circuit 22 which normalizes the output.
23 The gain of the second section is set at .22. The resultant 24 output of the two fiiter sections and the soft limiter provide the necessary tone separation over a 30 DB dynamic 26 input range.

27 In the CPM mode, the filter 20 provides frequency selection 28 for the following center frequencies depending on the applied 29 clock frequency Center Fre~uenc~
31 347.58 Hz 32 438.26 Hz 33 480.00 Hz 34 620.00 Hz.

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1 In the ANSWERTONE mode, a control signal is applied to the 2 filter select line of filter 20 which will provide one of the 3 following center frequencies for filter 20, depending on the 4 frequency of the filter clock signal frequency.
Center Fre~uen~
6 ANSWERTONES 2016 ~z 7 2122 Hz 8 2240 Hz 9 2371 Hz The filter output signal is applied to the input of a filter 11 energy detector 24. The filter energy detector 24 comprises 12 a first comparator stage 25 connected as a zero crossing 13 detector. A capacitor 27 is charged to a level corresponding 14 to the state of comparator stage 25. Comparator 26 is connected to provide a comparison between a signal 16 proportional to the average energy stored on capacitor 27, 17 and a reference voltage established by resistors 26a, 26b and 18 26c. Control over the reference threshold for comparator 25 19 of filter energy detector 24 is provided through diode 28 and resistor 29. During the ANSWERTONE mode, resistor 29 is 21 shunted across resi.stor 30 to alter the reference threshold 22 of comparator 25 in the ANSWERTONE mode. Whenever the signal 23 energy exceeds the reference voltage, a logic 1 level is 24 provided on output terminal 24a.

The overall line energy detector 30 ox Figure 2 is also 26 connected to the telephone line 11. Energy detector 30 is 27 similar to the filter energy detector 24 comprised of the 28 first amplifier 31 which establishes a charge on capacitor 32 29 proportional to the sensed line- energy on telephone line 11.
Comparator 33, has a reference voltage established by 31 resistors 33a, 33b and 33c, which will indicate the presence 32 of signal energy on telephone line 11, independent of the 33 frequency of the telephone line 11 signal energy, by 34 establishing a logic 1 signal level on the energy detect output line 30a.

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1 Thus, the operation of the circuitry of Figure 2 is seen to 2 comprise (1) an indication ox the presence of any electrical 3 energy on the telephone line 11, and a frequency scanning of 4 the energy appearing on telephone line 11 to detect a pair of tones, such that a busy signal, dial tone, fast busy and 6 ringing signals are detected. In the ANSWERBACK mode, filter 7 20 will sample the energy appearing on telephone line 11 and 8 identify any of four (4) answer tone signal frequencies which 9 may be present.

Turning now to Figure 3, there is shown an output register 36 11 which will store Rn indication of the frequencies of signals 12 detected by the filter energy detector. Register 36 is part 13 of a programmable logic array, PI,A, which includes a decoder 14 33 to receive the filter energy detector output 24a, as well as the output logic level from line energy detector 30.

16 The programmable logic array 34 ox Figure 3 receives as an 17 input the filter detector output logic level, as well as the 18 line energy detector 30 output logic level. Additionally, 19 the timer circuit 38 provides for address signals Q1-Q6 to PLA 34 indicative of the center requency of bandpass filter 21 20. Thus, as the filter 20 is scanning in response to a 22 clock signal, synchronized with timer 38 in a manner to be 23 explained, decoder 33 will decode timer outputs Ql-Q6 when 24 the filter detector output logic level is 1. This decoding will load register 36 with the following data format, 26 depending on which pair of center frequencies produces a 27 logic 1 output from filter detector 24.

.

~;~2758~

~5A98~-005 10 4350,440 0 0 1 1 .DIAL TONE
5440,480 1 0 0 1 RING BACK
6480,620 1 1 0 0BUSY & FAST BUSY

7The registers 36a, 36b, 36c and 36d are included in the 8 programmable logic array 34. The array is programmed such g that the register will assume the above configuration in response to detected filter energy, and the state of timer 38 11 at the time of filter energy detection.

12 After the resisters 36a, 36b, 36c and 36d are loaded, an IRQ
13 command is initiated 250 ms after the first detection of 14 energy as indicted by the ED LATCH 35 contained in PLA 37.
Upon receipt ox the IRQ signal, the computer of Figure 1 will 16 initiate an CPSEL command, which is decoded in the command 17 register 15. The CPSEL signal, when low, will apply the 18 contents of registers 36a, 36b, 36c and 36d to the 8 bit 19 parallel bus 18.

Timer 38 is enabled in response to the CPTL signal from 21 command register 15 and controls both frequency slewing and 22 cadence timing. CPTL signal is applied~upon command of the 23 CPU 12 to initiate the call progress monitoring function.
24 Timer~38 counts 32 Hz clock pulses from clock 39 to provide a time indication relative to the first indication of energy on 26 the line via outputs Q1 through Q6. The first energy 27 detection observed, at the leading edge thereof, sets the 28 output of a latch, denoted ED LATCH 35, contained in PLA 37 29 and resets timer 38 to begin timing again. PLA 34 decodes the ED LATCH indication and applies it to one of the eight lines 31 of bus 18 when a CPSEL command is applied. Additionally, PLA
32 37 decodes the ED LATCH, and outputs Q1 through Q6 to 33 generate the IRQ at 250 ms after the first energy detection.

51!~6 l This IRQ signals the computer that signal frequency slewing 2 is complete, and data indicating the detected tone 3 frequencies is available. At the conclusion of 250 4 milliseconds, after being reset by the line energy detector output signal, timer 38 continues to count clock pulses 6 supplied by a 32 Hz. clock generator 39.

7 As noted, during the counting of the clock pulses, if energy 8 is detected on the telephone line 11, the ED LATCH 35 9 internal to the PLA 37 containing timer 38 will be set and timer 38 will be reset to begin counting again. In the event 11 that no energy is detected on the telephone line 11 as sensed 12 by energy detector 30, timer 38 will continue counting 13 without being reset for a full 3.18 to 3.78 seconds. The 14 absence of energy detected at the EDL input of PLY 3~4 at this pull count will be decoded as a DEAD LXNE condition.
16 Register 36 will have been loaded with the binary number 17 1111. The DEAD LINE condition will also generate, through 18 the decoding of decoder 33, an IRQ command. The IRQ co~nand 19 will result in the CPU 12 yenerating a CPSEL signal which will dump the contents of register 36 on bus 18, indicating 21 an inactive telephone line.

22 Assuming that energy detection has occurred on the telephone 23 line 11 prior to the time out of 3.18 to 3.78 seconds of 24 timer 38, the first reset of timer 38 occurs with the first leading edge of energy envelope detection. Timer 38 will be 26 reset to count, ED LATCH will be in a logic 1 state, and at 27 the following faIling edge of energy, on the ED input of PLA
28 34, the count presented by timer 38 on lines Ql, Q2, Q4, Q5 29 and Q6 will be decoded. This count represents the cadence.
Cadence at the following intervals will determine the line 31 condition and the state of register 36:
32 Cadence Time Line Signal Condition Q0 Ql Q2 Q3 33 810 ms 2.18 s Ring 1 0 0 34 2.18 s 3.13 s Dial Tone 0 0 437 ms 562 ms Busy 1 1 0 0 Z~7586 l Thus, by appropriately decoding the timed cadence intervals 2 represented by the output of timer 38 at the time of a 3 falling edge of the signal from line energy detector 30 to 4 the ED input of PLA 34, it is possible to load in register 36, at a time following the tone analysis which occurred 6 during the first 250 milliseconds of timer 38's operation, 7 the detected cadence information.

8 In the case of DIALTONE, which has no cadence, if the line 9 energy detector 30 does not indicate a subsequent leading edge after 2.18 to 3.13 seconds of ED LATCH being set, ll decoder 33 will decode the counter output during -this 12 interval to provide data in output register stages 36a 13 through 36d of 0011 and generate an IRQ signal.

14 The IRQ interrupt will also be sent to the CPU 12 upon a falling energy level detection by detector 30. CPU 12 will 16 then read registers 36a through 36d by applying an CPSEL
17 signal to the command register 15 of Figure l, which will 18 decode it and apply the output siynals of register stages 36a 19 throuyh 36d to the bus 18. Once the call progress monitor has completed its cycle of frequency analysis and cadence 21 timing, subsequent falling signal levels will generate an IRQ
22 signal when in the CALL PROGRESS mode. Thus, it is possible 23 to monitor subsequent line activity by counting interrupts.

24 When a DEADLINE detection or DIALTONE detection is made by decoding the timer outputs of timer 38, and the state of ED
26 LATCH 35 output, decoder 33 will also initiate an IRQ to 27 permit register 36 to be read.

28 The timing circuitry for slewing filter 20 across both the 29 CALL PROGRESS mode frequencies of interest, and the ANSWERTONE frequencies of interest, is shown more 31 particularly in Figure 3. Referring now to Figure 3, there 32 is shown a Motorola HC 4040 counter ~0. A second clock 41 of 33 4.032 megacycles is applied through a decoder 45. Decoder 45 ~Z75~3~

1 comprising a PLA, is programmable from Q2~ Q1 from timer 38 2 applied to inputs DL1 and DL2. The DLl, DL2 inputs provide 3 for one of four (4) decoding selectionsO For a selected 4 decode nurnber, counter 40 will be decoded, and a reset signal RST which is at a frequency for controlling filter 20, resets 6 the counter 40. Thus, counter 40 is reset in accordance with 7 the decode conditions received from timer 38. As such, timer 8 38 can, from Ql and Q2, select a clock frequency for filter 9 20 having a duration of 62.5 ms. and a duty cycle which selects a center frequency for filter 20. Decoder 45 11 receives a mode input as well to select decoding for either 12 receiving ANSWERTONEs or CALL PROGRESS mode signal tones.
13 The reset signal used to reset counter 40 toggles a T
14 flip-flop 47 within the decoder 45. The frequency of the T
flip-flop 47 represents a 50~ duty cycle clock which drives 16 the clock input of the filter 20. The Mode control input is 17 decoded by decoder 45 Jo apply a logic 1 or 0 state to the 18 FILTER SELECT control line of the filter 20. additionally, 19 the comparator threshold of filter energy detector 24 is modified when the mode control indicates that an ANSWERTONE
21 frequency detection function is desired.

22 The CP mode control line will also inhibit counting of 23 counter 38 after 250 ms in the ANSWERTONE mode. This is 24 effected by decoding in PLA 37. Thus, once frequencies slowing is complete over the ANSWER TONE bandwidth, counter 26 38 stops counting.

27 System Description 28 Having now described the call progress monitor in terms of 29 specific hardware details for implementing both call progress monitoring and ANSWERTONE monitoring, the opera-tion of the 31 circuit in typical use will be explained.

32 During the ANSWERTONE mode, the CPMODE line is set to a logic 33 1 state prior to applying the CPCTL signal. This will 34 inhibit a cadence interrupt from being issued through the ~Z;2'758~

1 decoding of PLA 37 which constitutes the timer 380 During 2 the first 250 ms of pulse counting of counter 38, the filter 3 21 will be slewed over the ANSWERTONE frequency bandwidth. A
4 single interrupt will be issued at the end of 250 ms to initiate reading of the contents of register 36 by CPU 12.

6 When the operator of CPU desires to initiate communication 7 over telephone line 11, the call progress monitor function is 8 initiated by CPU 11. This selected function is decoded by 9 the command register 15 to indicate l that the CP mode is CALL PROGRESS mode rather than ANSWERTONE, and (2) that the 11 timer is to be activated by holding the CPTL line in a logic 12 1 state.

13 When command register 15 indicates these conditions to the 14 call progress monitor, timer 38 is enabled to start counting the 32 Hz. clock. er 38 will count clock pulses for a 16 total of 3.187 seconds, unless restarted by the detection of 17 a leading edge of signal energy on telephone line 11 by line 18 energy detector 30.

19 When signal energy is detected on telephone line 11, the usual circumstance in a normal operating telephone line, 21 counter 38 is restarted and the ED LATCH is set, indicating 22 the receipt of a leading edge of an energy pulse from line 23 energy detector 30. The timer 38 will continue to count for 24 a period of 250 milliseconds before pôsting an interrupt.
The IRQj the interrupt indication, is detected by decoding Ql 26 through Q6 of output register 36 and the setting of the ED
27 LATCH. During the first 250 milliseconds, the Ql and Q2 28 outputs of timer 38 have selected four ~4) discreet tuning 29 frequencies for filter 20. As will be recalled from the discussion of decoder 45 and counter 43, Q1 and Q2 outputs of 31 ~-imer 38 have selected a clock frequency for filter 20 for 32 tuning the filter to each of the four frequencies of 33 interest.

~Z2758~

~984-005 15 l During this first 250 milliseconds, wherein filter 20 is 2 slewed over the bandwidth of interest, output register 36 3 will, under the control of timer 38, receive a filter signal 4 detection indication for each tone detected and one of four, 4 hit codes will be entered into its four output register 6 stages 36a through 36d. Thus, at the conclusion of the first 7 250 millisecond interval, after detecting signal energy, the 8 identity of the frequency of each signal tone is available at 9 output register 36. The IRQ signal will thus be initiated, and the contents of output register stages 36a-36d maintained ll for a total of 93 milliseconds. Upon receipt of an IRQ
12 signal computer 12 will initiate a CPSEL command to dump the 13 contents of register 36 onto bus 18.

14 With the tone information thus decoded, and presented to the bus 18 for analysis by CPU 12, cadence timing can be 16 determined. Timer 38 continues counting from 250 17 milliseconds forward until the next line energy detection 18 output 30 indication is presented, indicating the 19 interruption of signal energy on telephone line 11. The count of timer 38, represented on output lines Q1 through Q6, 21 will be decoded at this next energy detection and loaded in 22 registers 36a and 36d. The presented data represents the 23 cadence between pulses occurring in a ringing signal, busy 24 signal and fast busy signal detected on telephone line 11.
The dial tone indication is noted, when timer 38 has counted 26 between 2.18 and 3.13 seconds. When this time is presented 27 at the output of timer 3~, on Q1 through Q6, and the line 28 energy detector output has not fallen DIALTONE is present.
29 Register stayes 36a-36d are loaded to indicate a steady DIALTONE condition with no cadence on telephone line 11.
31 Additionally, an IRQ signal is posted, thus indicating 32 cadence timing information is ready for the CPU. Timer 38 33 under all cadence conditions will reach a full count and 34 cease counting. Upon a reset of the CPCTL signal, the call 3s progress mode will be restarted.

~2275~6 1 In the event that no energy is present on the line, under a 2 dead line condition, the FD LATCH is never set, as never 3 having detected -the signal energy. Thus, timer 38, having 4 not been reset, reaches its full count of 3.13 to 3.81 seconds, the NO LATCH condition detected by decoding of PLA
34 will be entered as a binary code in register stayes 36a 7 through 36d. The IRQ is posted at the end of the cycle 8 permitting the DEADLINE condition to be dumped onto bus 18 9 when CPU 12 initiates a CPSEL command. The call progress mode can be restarted by a reset of the CPCTL signal.

11 When the mode change to ANSWERTONE is effected, the timer 38 12 will begin timing when the CPL signal is in a logic 1 state.
13 The decoder 45 will generate clock pulses for the filter 20 14 which covers the ANSWERTONE frequency of interest as well as select the ANSWERTONE BANDWIDTH of filter 21. Each time a 16 ANSWE~TONE is detected during slewing ox filter 20, these 17 indications wiLl be entered in output register 36. Output 18 register 36 will post an IRQ signal when timer 38 has reached 19 the 250 millisecond titling position and timer 38 ceases counting. The CPU 12 may then initiate a CPSEL signal for 21 dumping the contents of register stages 36a-36d on the 8 bit 22 bus 18.

23 Thus, there has been described with respect to one 24 embodiment, a call progress monitor which will permit monitoring the telephone line signal conditions before 26 connecting a communicating computer to the telephone line.
27 Additionally, ANSWERTONEs present on the line will be 28 detected and identified by the call progress monitor under 29 control of the CPU. Those skilled in the art will recognize yet other embodiments of the invention described by the 31 claims which follow.

Claims (13)

The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:

1. In a computer telephone interface system, a call progress monitor comprising:

an energy detector connected to receive signals from a telephone line;

a bandpass filter connected to said telephone line, having a selectable center frequency, said bandpass filter having a control input for selecting one of a plurality of bandpass center frequencies;

a counter-timer connected to count clock pulses, said counter-timer having a reset input connected to said energy detector whereby timing commences in response to the presence of a signal on said telephone line;

center frequency control means connected between said counter-timer and said bandpass filter, said control means changing the frequency of said bandpass filter in synchronism with the counting of said counter-timer during a first portion of the period counted by said counter-timer;

a signal detector connected to said filter for indicating the presence of a signal passing through said filter;
a data register; and, decoding means connected to said counter timer and said signal detector for generating during a first portion of the period counted by said counter, a binary signal indicating the frequency of said bandpass filter which passes a signal;
and for generating during a second portion of said period a binary signal indicating the cadence interval of signal energy detected by said energy detector, said decoding means sequentially inserting said frequency indicating and cadence indicating binary signals in said register.

2. The call progress monitor of claim 1 wherein said center frequency control means comprises:

a counter connected to a source of high frequency clock pulses;

a decoder matrix connected to parallel outputs of said counter, said decoder matrix including a plurality of decode outputs, one of which is selectable in response to a state of said counter-timer, said outputs connected to a reset input of said counter, and to said filter control input, whereby said counter counts a number of high frequency clock pulses depending on which of said decode outputs is selected, and said filter center frequency is selected depending on the time interval between pulses produced by said decode outputs.

3. The call progress monitor of claim 1 wherein said data register produces an interrupt signal to a computer at the end of said first portion of said counting period.

4. The call progress monitor of claim 1 wherein said data register stores in an address identified by said counter-timer a signal from said signal detector.

5. In a computer telephone interface system, a call progress monitor comprising:

an electrical energy detector connected to a telephone line;

a switched capacitor filter connected to said telephone line, said filter having a plurality of bandpass frequencies, one of which is selectable in response to a clock signal applied to a control input;

a signal detector connected to said switched capacitor filter output;

a timer circuit connected to receive clock pulses;

filter frequency control means connected between said switched capacitor filter control input and said timer, said control means sequentially selecting each of said bandpass frequencies in response to changes in state of said timer;
and means connected to receive said timer output signals, said energy detector signal, and said signal detector output, said means including a number of register stages and decoder for loading in said register stages a binary number indicating one of said filter bandpass frequencies which passes a signal from said telephone line.

6. The call progress processor of claim 5 further comprising:

means for decoding the count of said timer when said electrical energy detector indicates an interruption of energy on said telephone line;

means for reading into said registers a decoded count from said means for decoding, said decoding representing a cadence measurement of said telephone line detected energy.

7. The call progress processor of claim 6 further comprising means for initiating an IRQ command to a computer when said registers have received data.

8. The call progress processor of claim 7 further comprising means for reading said data in said registers.

9. In a computer telephone interface system, a call progress monitor comprising:

an energy detector connected to receive signals from a telephone line;

a variable frequency bandpass filter connected to said telephone line, said filter having a frequency controlled in response to an electrical signal;

a filter energy detector connected to indicate the presence of a signal passed by said filter;

a counter for counting clock pulses, said counter being set to count in response to a CPCTL command from said computer;

frequency control means coupled to said counter and said filter for supplying said electrical signal for sequentially changing said bandpass filter center frequency in synchronism with said counter;

decoding means connected to said counter and said filter energy detector, said decoding means generating a signal identifying a center frequency of said bandpass filter which passes a signal from said telephone line; and register means for storing said signal identifying said center frequency to pass a signal from said filter.

10. The call progress monitor of claim 9 further comprising:

means for initiating an interrupt signal to said computer telephone interface system when said register means stores said identifying signal; and means for applying said register means stored signal on a common bus of said computer svstem in response to a command from said computer telephone interface system.

11. The call progress monitor of claim 9 further comprising:

means for resetting said counter when a first signal is received from said energy detector;

means for decoding the time interval represented by said counter when a subsequent signal is received from said energy detector; and means for storing in said register means during the remaining portion of said period counted by said counter said decoded time interval, whereby cadence data for signal energy appearing on said telephone line is made available to said telephone computer system.

12. The call progress monitor of claim 11 comprising:

means for decoding the absence of a counter reset initiated by said energy detector; and means for storing in said register an indication that no reset has occurred indicating a dead line condition.

13. The call progress monitor of claim 11 further comprising means for storing in said register a binary signal indicating the presence of a dial tone in said counter when a subsequent signal from said energy detector is not received within a predetermined time interval.