CA1080359A - Control circuit for a code reading device - Google Patents
Control circuit for a code reading deviceInfo
- Publication number
- CA1080359A CA1080359A CA282,667A CA282667A CA1080359A CA 1080359 A CA1080359 A CA 1080359A CA 282667 A CA282667 A CA 282667A CA 1080359 A CA1080359 A CA 1080359A
- Authority
- CA
- Canada
- Prior art keywords
- state
- signal
- bistable
- reading device
- bistable means
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K7/00—Methods or arrangements for sensing record carriers, e.g. for reading patterns
- G06K7/10—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation
- G06K7/10544—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation by scanning of the records by radiation in the optical part of the electromagnetic spectrum
- G06K7/10821—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation by scanning of the records by radiation in the optical part of the electromagnetic spectrum further details of bar or optical code scanning devices
- G06K7/10861—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation by scanning of the records by radiation in the optical part of the electromagnetic spectrum further details of bar or optical code scanning devices sensing of data fields affixed to objects or articles, e.g. coded labels
- G06K7/10871—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation by scanning of the records by radiation in the optical part of the electromagnetic spectrum further details of bar or optical code scanning devices sensing of data fields affixed to objects or articles, e.g. coded labels randomly oriented data-fields, code-marks therefore, e.g. concentric circles-code
Abstract
Title of the Invention CONTROL CIRCUIT FOR A CODE READING DEVICE
Abstract of the Disclosure An optical reader control system is disclosed wherein signals generated from detecting means positioned upstream and downstream of the optical reader control the operation of the optical reader to enforce the movement of a merchandise item past the optical reader within a pre-determined path. Logic circuitry is disclosed for process-ing the detecting means signals for determining the occurrence of a valid read operation by the optical reader.
Abstract of the Disclosure An optical reader control system is disclosed wherein signals generated from detecting means positioned upstream and downstream of the optical reader control the operation of the optical reader to enforce the movement of a merchandise item past the optical reader within a pre-determined path. Logic circuitry is disclosed for process-ing the detecting means signals for determining the occurrence of a valid read operation by the optical reader.
Description
1~03S9 Background of the Invention The present invention relates to a system for processing data derived from reading coded labels attached to merchandise items during a checkout operation. In order to increase the speed of the checkout operation, optical scanner devices have been incorporated into checkout count-ers for readlng data encoded indicia on labels affixed to the purchased merchandise items. Movements of the merchan-dise items past the scanner device results in the scanner 10 device reading the encoded indicia labels. To control the operation Gf the scanner device, detecting means have been positioned in the path of movement of the merchandise items to operate the scanner device in accordance with the position of the merchandise items with respect to the scanner device.
Thus, a first or enter detector means positioned upstream of the scanner devlc~ will turn on the scanner device ~or oper-ation upon detecti.ng the presence of a merchandise item up-stream of the scarmer device, while a second or exlt detector means located downstream of the scanner device will turn the 1 20 scanner device off upon detecting the presence of the mer-j chandise item downs~ream of the scanner device. In actual operation, it has been found that the checkout operator in moving a merchandise item past the scanner device will some-times lift the item above the detectors so as not to trip one or th0 other detector means during the checkout operation.
Y When this occurs, the operator is notifled by signal lights . ~ .
Thus, a first or enter detector means positioned upstream of the scanner devlc~ will turn on the scanner device ~or oper-ation upon detecti.ng the presence of a merchandise item up-stream of the scarmer device, while a second or exlt detector means located downstream of the scanner device will turn the 1 20 scanner device off upon detecting the presence of the mer-j chandise item downs~ream of the scanner device. In actual operation, it has been found that the checkout operator in moving a merchandise item past the scanner device will some-times lift the item above the detectors so as not to trip one or th0 other detector means during the checkout operation.
Y When this occurs, the operator is notifled by signal lights . ~ .
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3 S9 located in the checkout counter or by audio tones to repeat the read operation. In repeating the checkout movement, the operator will sometimes trip both detectors or one of the de-tectors in returning the merchandise item to a start position prior to moving the items past the scanner device in the proper direction, resulting in the mis-operation of the scanning de-vice. It is therefore an object of this invention to provide an optical scanner control system which will efficiently utilize the scanner device irrespective of the movement of the merchandise items past the scanner device. It is a further ob~ect of this invention to provide a control system for operating the scanner device in a manner to force a prescribed mode of operation by the checko~t operator to maximize the performance of the scanning unit. -~
SummarY of the Invention In accordance with a preferred embodiment to this ~ ;
invention, there i~ provided a digital circuit operating in response to signals indicating the presence of a record member upstream and downstream of a code reading device and a signal indicatin~ that the data read by the code reading device i8 valid. The circuit generates a good or bad read signal in accordance with the signals generated and the sequence of their generation, thereby determining whether a proper read operation has occurred. A single shot multivibrator is utilized in the circuit to limit the time the signals are to be generated before a new read operation is initiated. To further ~-define the invention there is provided a first detecting means positioned upstream of the code reading device for generating a first signal upon detecting the presence of a récnrd member, said first signal initiating the operation of ~ -. .
said code reading device, means responsive to the operation of the reading device for generating a second signal indicating the validity of the code reading device, a second detecting means positioned downstream of the code reading device for generating a third signal upon detecting the presence of a record member, and logic means responsive to said first, second and third signals for determining the validity of said read operation including means actuated by said first signal for disabling said logic means after a predetermined time has elapsed thereby limiting the time said signals are to be generated.
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Brief Descri~tion of the Drawin~s Additional advantages and features of the present invention will become apparent and fully understood from a reading of the following description taken together with the annexed drawing, in which:
F'ig. 1 is a perspective view of a portion of a checkout counter showing the general arrangement of the elements of the scanning assembly flnd the control gates.
Fig. 2 is a simpllfied block diagram of the data processing system constructed in accordance with this in-vention.
Fig. 3 is a detailed circuit diagram of the gate control loglc unit of the system shown in Fig. 2.
Fig. 4 is a simplified flow diagram illustrating the operation of the system.
Descrlptlon of the Preferred Embodiments Referring now to Fig. 1, there is shown a perspec-tive vlew of the optlcal scanning system in which the present lnvention is utillzed, the system including a scanning assembly generally indicated by the numeral 18 comprising a light source 20 emltting an optlcal scannlng light beam 22 in the visible or near visible spectrum, the llght beam being directed through an aperture 24 located in a supporting surface 26 of a checkout counter. The light source 20 may be a helium or neon laser that is pumped to produce a continuous laser beam of red mono- -chromatic light of approximately 6,32~ angstrom wavelength.
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~080359 In a manner that is well known on the art, the light beam 22 produced by the source 20 may be focused by a lens system 28 onto a multi-faced mirror 30. The mirror 30 is mounted on the shaft 31 of a motor 32 which rotates the mirror 30 at a substantially constant speed. The mirror 30 is positioned to intercept the light beam 22 and pro~ect same through the aperture 2L~ to scan the encoded indicia located on a label 34 aff'ixed to a merchandise item 36, the encoded indicia comprising a plurality of black and white coded areas representing data concerning the identity of the merchandise item. The rotation of the mirror 30 causes a successlon of light beams 22 to scan any encoded label 34 posltioned over the aperture 24.
The light beam 22 is reflected off the label 34 through an optical filter 38 to a photo-responsive pick-up device such as a photo multiplier l~o which converts the re-flected light beams into electrical signAls, the amplitude of which corresponds to the amount of light received. Thus, the amplitude of the light reflected from the white coded area on the label 34 will be greater than the light reflected from the black coded area. Conventional amplifying circuits will produce a relative high voltage which can be assigned a ¦ binary one when the beam 22 is scanning a black coded area on the label and a relatively low voltage to which is assigned a binary zero when scannlng a white coded area. Thus, the in-~ormation contained on the label 34 can be decoded and used , I
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for input to a terminal devlce for displaying and recording the information read.
To force a prescrlbed mode of operatlon by the check-out operator in order to maximize the operation of the scanning assembly 18, to provide the scanning assembly informAtion as to when a merchandise item 36 is in the scanning area, and to en-able the operation of the scanning assembly, sensing means in the form of photo detectors hereinafter referred to as item gates are positioned ad~acent the front and rear of the aper-ture 24 to detect the presence or absence of a merchandiseitem 36 in that area. As shown in Fig. 1, the enter ltem gate may comprise a photodiode 42 or similar photoresponslve device mounted in an upstandlng rail member 44 located ad~acent one edge of the surface 26 of the checkout counter. Such photo-diode 42 is positloned upstream of the aperture 24 and at a predetermined helght above the surface 26 and recelved a con-tinuous beam of light from a conventional light source 46 lo-cated ln a rail member 48 mounted on the opposite edge of the i surface 26. An exit item gate comprising a similar photodiode 50 is positioned downstream of the aperture 24 in the rail mem-ber 44. The photodiode 50 receives a light beam from a light ¦ source 52 located in the opposite rail member 48. Both photo-diodes 42, 50 will generate a signal upon the interruption of the light beam in a manner that is well known ln the art.
Referrlng now to Flg. 2, there is shown a block diagram of the data processing system which incorporates the 1 .
~0803~9 scannlng assembly 18 of the present invention. Forward move-ment of a merchandise item 36 on the supporting surface 26 of the checkout counter (Fig. 1) will trip the enter item gate 54 by intercepting the light beam from the light source 46, thereby generating a control signal from the photodiode 42 over line 56 to a gate control logic unit 58 of the scanning system 60. The scanning system 60 of the present embodiment~ shown ln Flg. 2 within the dotted llnes, includes the scanning assembly 18 which further lncludes detection loglc for processing the sig-nal from the scanning assembly, the item enter and exit gates 54, 74 discussed above with respect to Fig. 1, an encoded data : processlng logic unit 61 which may in some applications com-prise a micro-processor for checking and decoding the encoded -data read by the scanning assembly 18 and for generating a signal to the gate control logic unit 58 indicating the validity of the read operation, and a conventional memory storage 65 and output buffer 64 for transmitting the data read over line 63 to a central processing unit (CPU) 66. Examples of encoded data checking circuits which may be used to check the data read by the scanning assembly 18 may be ~ound in Unlted States Patents Nos- 3,784,792, 3,906,203 and 3,753,227.
The control ~ignal transmitted from the enter item gate 54 to the gate control logic unit 58 upon th~ tripping of the gate 54 by a merchandlse item 36 will turn on the light source 20 in the scanning assembly 18 by transmitting a scanner enable s~gnal over line 62 to the scanning assembly 18. The -.
- 1~803S9 scanning assembly 18 will read the label 34 on the merchandise ltem 36 and transmit the data read to the encoded data process-ing loglc unit 61. The processing logic unit 61 will decode and check the encoded data to determine if the data is valid or not and then generate a control signal over line 68 to the ~ `
gate control logic unit 58 indicating a good or bad read oper~
atlon. In addition, the logic unit 61 will generate a signal - to light a display 70 on the checkout counter indicating a good read or a display 72 lndlcating a bad read. As will be described more fully hereinafter with respect to the gate control. logic unlt 58, the lndication of a good read as determined by the logic unit 61, together with the tripping of the enter gate 5~ :
and the exit gate 74 will provide the necessary control signals for operating the scanning assembly 18 in accordance with the present inventionO When the encoded data read by the scanning assembly 18 is determined to be valid by the logic unit 61, the data will be transmitted to the output buffer 64 prepara-tory for transmission over line 63 to the CPU 66 which will cause the data to be printed by the printer 76 and displayed in the display 78 of a data terminal device (not shown) uti-lized in the checkout operation.
Referring now to Fig. 3, there is shown circuit de-tails of a gate control logic unit 58 (Fig. 2) for controlling .I the operation of the scanning assembly 18, which taken in con-, ~unction with the flow diagram shown in Fig. 4 will disclose ~, the overall system structuré and operation. The logic circuit , .
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1~i8~)3S9 of Fig. 3 employs J-K flip-flops 80, 82l 84 and 86 which are of the type including a bistable circuit having two stable states which may be referred to as the "set" or "high" and "re-set't or "low" states. Each such flip-flop includes a trigger input J such that a low to high transition on this input is always effective to switch the state of the flip-flop from its current state to the opposite state, and a reset input R such that a low to high transition thereon will switch the flip-flop from the set state to the reset state of the flip-flop when the flip-flop is in the set state. Eac~l flip-flop 80, 82, 84 and 86 also has a set output Q and a reset output Q and the arrangement is such that when the flip-flop is in the set state, the set and reset outputs are high and low, respectively, and such that when the flip-flop is in a reset state, the set and reset outputs are low and high, respectively. Each flip-flop further has a clock input C for operatlng the flip-flop in a ; manner well known in the art.
The loglc circuit shown ln Fig. 3, in addition to the flip-ilop 80, 82, 84 and 86, further includes a one-shot multi-vibrator 98 for llmiting the time of each scanning operation ofthe assembly 18. Prior to the movement of a merchandise item 36 past the aperture 24 (Fig. l) in the checkout counter sur-iace 26, the logic circuit of Fig. 3 is normally in an idle state with each of the flip-flops 80, 82, 84 and 86 in a reset conditlon. Upon movement of a merchandise item 36 through the light beam generated by the light source 46, the enter gate 54 ;~
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1(j80359 (Flg. 2) is tripped resulting in the signal lGE (Fig. 3) which is high being transmitted from the photodiode 42 over line 56 (Figs. 2 and 3) to one input of an AND gate 92 there-by enabling the AND gate 92. The other two inputs of the AND
gate 92 are both high at this time and include the output term lGL of the exit item gate 74 and the output term ~ of the flip-flop 86. The term lGL is the output term of an inverter 106 and is high when the term lGL of the exit item gate 74 is low~ the latter occurring when the exit item gate 74 is in its untripped co~dition. The AND gate 92 going high wlll enable an AND gate 94 over line 96 an(l further enable the single-shot multivibrator 98 for operation over line 100. The multivi-brator 98 functions as a time-out and will be reset after a two second operation, thereby controlling the length of tlme the scanning assembly 18 will be enabled.
The output term TOQ of the multivlbrator 98 upon going high will enable an AND gate 104 whose output term LON
will be transmitted over line 62 (Fig. 2 and 3) to the scann-lng assembly 18 which turns on the light source 20 (Fig. 1) 20 allowing the scanning assembly 18 (Fig. 2) to scan the encoded label 34 (Fig. 1) in the manner descrlbed previously.
The enabling of the AND gate 94 (Fig. 3) by the tripplng of the enter gate 54 (Fig. 2) will, in conJunction wlth the clock signal at the C input, set the J-K flip-flop ~-80 and thereby transfer the circuit of the gate control logic i unit 58 (Fig. 2) from an idle state to a first state. When ' ( -lG803S9 the control logic unit 58 is in the first state, the system is conditioned to operate only when one of the followlng events occur; the exit item gate 74 (Fig. ~) is tripped; a ; ' signal is received from the encoded data processing logic unit 61 indicating that a good read was obtained by the scanning assembly 18, or the multivibrator 98 times out.
Setting of the flip-flop 80 will result in the output term SIQ going high which conditions an AND gate 108 for opera-tion upon the tripping of the exit item gate 74 (Fig. 2).
If this event occurs lmmediately after the tripping of the enter item gate 54, a signal lGL generated by the photodiode 42 (Fig. 1) over line 109 (Fig. 2) to the control logic unit 58 will enable the AND gate 108 whose output will enable an AND gate 120 and thereby set the flip-flop 82 which places the control logic unit 58 in a second state. When in the second state, the control loglc unit 58 i8 conditloned to either comple,te the read operation upon recelving a good read slgnal from the procegsing logic unit 61 or require the operator to initiate another scannlng operation. This latter ' 20 event wlll occur if such good read signal is not received by the control logic unit 58 within two seconds or whatever time the multivibrator 98 is set to time out~ or if the exit item gate 74 returns to its uninterrupted state, the circuit of the logic control unit 58 returning to its idle state upon the enter gate 54 being cleared o~ a merchandise item in a manner that will now be descrlbed.
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1~80359 The output term SlQ of flip-flop ~0 (as shown in Fig. 3) is also applied to the OR gate 110 whose output is applied to one input of the AND gate 112. Upon the tlming out of the multivibrator 98, the output term TOQ of such multivibrator 98 goes high enabling AND gate 112 whose out-; put term BRA is transmitted over line 114, through OR gate 116 and over line 118 to set the flip-flop 86 and thereby put the circuit of the control logic unit 58 in a fourth state. The output term BRA indicating a bad read i3 also transmitted to the encoded data processing logic 61 over line 121 (Fig. 2) which turns on the display 72 indicating to the operator the bad read result of the scanning opera-tion, requiring the operator to lnitiate another read opera-tlon. When the circuit of the control logic unit 58 is in the fourth state, ~ valid read operation cannot be obtained and as described above, the system will return to the idle state in a manner descrlbed hereinafter upon the enter item gate 54 returning to its uninterrupted condition, thereby conditioning the scanning system 60 for a new read operation.
The output term SlQ of flip-flop 80 is al90 applied to one input of the OR gate 124, thereby conditioning the AND
gate 126 for operation upon receiving the term GRDD from the data processing logic 61 (Fig. 2) over line 68 indicating that a good read has been obtained from the scanning assembly 18, Wh~n this occurs the output of AMD gate 126 will set the flip-~lop 84 which puts the circuit of the control logic unit -12- ;~
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10803Sg 58 in a third state. When the circuit reaches this third state, the light source 20 (Fig. 1) is turned off and steps are taken to transfer the decoded data from the data proc-essing logic 61 (Fig. 2) to the buffer 64 for further proc-essing by the processor 66.
The setting of flip-flop 82 upon the successive tripping of the enter 54 and exit gates 74, will make the output term S2Q of the flip-flop 82 high and the term S2Q
low. The output term S2Q going low will disable AND gate 94 whlle the term S2Q going high will condition the AND gate 126 to set the flip-flop 84 upon the receiving of the good read signal GRDD from the data processing logic unit 61.
The term S2Q is also applied to the AND gate 128 which is enabled by the return of the exit item gate 74 to its clear -or uninterrupted posltion which occurs when the merchandise ltem clears the exit item gate 74. This sets the flip-flop 86 through OR gate 116 which puts the circuit of the control loglc unit 58 in t;he fourth state. When in the fourth state, the clrcult indicates that the merchandise item has passed through the scannlng assembly 18 without a good read being obtained. As shown in Fig. 3, the output signal lGL of the exlt ltem gate 74 is transmitted over line 109 (Fig. 2) to inverter 106 whose output term lGL will be high when the exit gate 24 is in the uninterrupted position. The term S2Q is further applied to OR gate 110 thereby conditloning AND gate 112 to set the flip-flop 86 upon the timing out of the . '' ~
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lG803S9 multivibrator 98 in the manner described previously.
The setting of flip-flop ~4 which occurs when the good read signal GRDD has been transmitted from the proc-essing logic 61 to the AND gate 126 will result in the out-put term S3Q going hlgh while term S3Q goes low the latter of which disables AND gate 94 and AND gate 104 thereby turn-ing off the light source 20 in the scanning assembly 18. The term S3Q is applied to the AND gate 130 which conditions the ; AND gate 130 for operation upon the tripping of the exit item gate 74 and the receiving of a signal XBA from logic within the buffer 64 over line 90 indicating that the buffer 64 has space available to receive data from the storage 65 (Fig. 2) for transmission to the processor 66. The output signal of AND gate 130 is transmitted over line 132 to initiate the transfer of data to the buffer 64. Thls output signal is also . .
transmitted through OR gate 116 and over line 118 to set the fllp-flop 86. The term S3Q is further applied to OR gate 110 thereby conditioning AND gate 112 to set flip-flop 86 upon the timing out of the multivibrator 98.
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' 20 The setting of flip-flop 86 upon the timmlng out of ¦ multivibrator 98, the enabling of AND gate 130 or AND gate 128 as described prevlously, results in the output term S4Q going hlgh while term ~ goes low, the latter of which disables AND ~:
gates 92, 120, and 126 thereby preventing the setting of flip-flop 80, 82 and 84. The term ~ also disables AND gate 104 after being applied to one of the lnputs of OR gate 119 which disables AND gate 104 from operation since the input term S3Q is low due to the ~lip-flop 84 being in a set condition.
As described previously, the output term LON of AND gate 104 ,' turns on the light source 20 in the scanning assembly 18 (Fig. 1). Output term S4Q going high further conditions AND
gate 134 for operation upon receivlng the signal lGE which goes high upon the enter ltem gate 54 returning to its un-interrupted condition after the merchandise item has cleared the gate. IGE going low will produce lGE in a high state after going through inverter 136. The output term RESET of AND gate 134 going high will reset the f'lip-flops 80, 82, 84 and 86 and the multivibrator 98 returning the logic circuit ~ ~
(Fig. 3) to the idle state preparatory to another read oper- ~ -ation.
Referring to Fig. 4 there is shown a flow diagram of the events that occur in the operation of the scanner unit 60 (Fig. 2). Prior to the movement of a merchandise item past the scanning assembly 18, the circuit of the control logic unit 58 (Fig. 3) is in the idle state which requires the enter item 20 gate 54 to be tripped in order to initiate a scanning operation. ~ -If the operator at this time moves the merchandise item past the aperture 24 ln the counter surface 26 without tripping the enter item gate but trips the exit item gate 74 or moves the item in the reverse direction~ thereby tripping the exit item gate 74 ~irst, the system will remain in the idle state and cycle between blocks 138 and 140.
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108~3S9 Upon tripping o~ the item enter gate 54, the circuit will enter the first state wherein a clear read signal (block 142) is generated to condition the data processing logic 61 and its associated circuits for a new read operation, the scanning assembly 18 (Fig. 1) is turned on (block 144) and the multivibrator 98 (Fig. 3) is activated. If a good read is detected (block 146) the circuit will enter state 3 and the light source 20 (Fig. 1) will be turned off (block 148).
If the exit item gate 74 (Fig. 2) has been tripped (block 150) and the transmit buffer 64 (Fig. 2) is available to receive data (block 152), the good read display 70 (Fig. 2) is illum-inated (block 154) and the data is transferred to the buffer 64 (block 156) for transmission to the processor 66. The circuit is now in the fourth state. Upon the returning of the enter item gate to its clear condition (block 158), the circuit will return to the ldle state (block 138, 140) pre-paratory to anothe3r read operation.
If after the light source 20 (Fig. 1) has been turned on and the circuit of the control logic unit 58 fails to receive a good read signal from the data processing logic 61 (Fig. 2) the clrcuit will check the exit item gate (block 160) to see if it has been tripped~ If it has not, the cir-cuit will cycle until a good read signal is received (block ¦ 146) or the m~tivibrator 98 times out (block 162). If the latter occurs first, the light source 20 will be turned off (block 164), the Bad Read display 72 (Fig. 2) is illuminated ., .
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(block 166) and the circuit returns to the idle state.
If the enter item gate 54 and exit item gate 74 are trlpped but the scanning assembly 18 falls to detect a good read, the circuit will go through blocks 160, 168, 170, and 172 to turn of~ the scanning assembly 18 preparatory to another read operation.
If a good read is obtained but the exit item gate 74 is not tripped, the circuit will cycle between block 150 and block 174 until a time out occurs thus resetting the scanning assembly 18 preparatory to a new read operation. If the exit item gate 74 does trip, but the buffer 64 (Fig. 2) is not available to receive the data, (block 152), the circuit will lndicate a bad read (block 166) and force the operator lnto another read operation.
It wlll be seen from the above descriptlon that the circuit of the control logic unit 58 will force a proper merchandise item movement past the scanning assembly 18 which re~uires that the enter ite~ gate be tripped before the exit ltem gate and before a good read slgnal is generated. The clrcuit will ignore an item movement in the reverse direction and will illuminate the bad read display if the above events do not occur in the sequence indicated, the transmit buffer i8 not available or lf only the enter item gate is tripped thereby ~orclng the operator to lnitiate a new read operation by moving ~ -the merchandise item in the proper direction pass the aperture 24 (Fig. 1) in the checkout counter surface 26.
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lG8~359 While only one embodiment of the invention has been described in detail herein and shown in the accompanying .
drawings, it will be obvious that variations and other em- :
bodiments are possible without departing from the scope of the invention~ It is thus contemplated that all such vari-ations and embodiments not departing from the spirit and scope of the invention hereof shall be construed ln accord-ance with the following claims.
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SummarY of the Invention In accordance with a preferred embodiment to this ~ ;
invention, there i~ provided a digital circuit operating in response to signals indicating the presence of a record member upstream and downstream of a code reading device and a signal indicatin~ that the data read by the code reading device i8 valid. The circuit generates a good or bad read signal in accordance with the signals generated and the sequence of their generation, thereby determining whether a proper read operation has occurred. A single shot multivibrator is utilized in the circuit to limit the time the signals are to be generated before a new read operation is initiated. To further ~-define the invention there is provided a first detecting means positioned upstream of the code reading device for generating a first signal upon detecting the presence of a récnrd member, said first signal initiating the operation of ~ -. .
said code reading device, means responsive to the operation of the reading device for generating a second signal indicating the validity of the code reading device, a second detecting means positioned downstream of the code reading device for generating a third signal upon detecting the presence of a record member, and logic means responsive to said first, second and third signals for determining the validity of said read operation including means actuated by said first signal for disabling said logic means after a predetermined time has elapsed thereby limiting the time said signals are to be generated.
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Brief Descri~tion of the Drawin~s Additional advantages and features of the present invention will become apparent and fully understood from a reading of the following description taken together with the annexed drawing, in which:
F'ig. 1 is a perspective view of a portion of a checkout counter showing the general arrangement of the elements of the scanning assembly flnd the control gates.
Fig. 2 is a simpllfied block diagram of the data processing system constructed in accordance with this in-vention.
Fig. 3 is a detailed circuit diagram of the gate control loglc unit of the system shown in Fig. 2.
Fig. 4 is a simplified flow diagram illustrating the operation of the system.
Descrlptlon of the Preferred Embodiments Referring now to Fig. 1, there is shown a perspec-tive vlew of the optlcal scanning system in which the present lnvention is utillzed, the system including a scanning assembly generally indicated by the numeral 18 comprising a light source 20 emltting an optlcal scannlng light beam 22 in the visible or near visible spectrum, the llght beam being directed through an aperture 24 located in a supporting surface 26 of a checkout counter. The light source 20 may be a helium or neon laser that is pumped to produce a continuous laser beam of red mono- -chromatic light of approximately 6,32~ angstrom wavelength.
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~080359 In a manner that is well known on the art, the light beam 22 produced by the source 20 may be focused by a lens system 28 onto a multi-faced mirror 30. The mirror 30 is mounted on the shaft 31 of a motor 32 which rotates the mirror 30 at a substantially constant speed. The mirror 30 is positioned to intercept the light beam 22 and pro~ect same through the aperture 2L~ to scan the encoded indicia located on a label 34 aff'ixed to a merchandise item 36, the encoded indicia comprising a plurality of black and white coded areas representing data concerning the identity of the merchandise item. The rotation of the mirror 30 causes a successlon of light beams 22 to scan any encoded label 34 posltioned over the aperture 24.
The light beam 22 is reflected off the label 34 through an optical filter 38 to a photo-responsive pick-up device such as a photo multiplier l~o which converts the re-flected light beams into electrical signAls, the amplitude of which corresponds to the amount of light received. Thus, the amplitude of the light reflected from the white coded area on the label 34 will be greater than the light reflected from the black coded area. Conventional amplifying circuits will produce a relative high voltage which can be assigned a ¦ binary one when the beam 22 is scanning a black coded area on the label and a relatively low voltage to which is assigned a binary zero when scannlng a white coded area. Thus, the in-~ormation contained on the label 34 can be decoded and used , I
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for input to a terminal devlce for displaying and recording the information read.
To force a prescrlbed mode of operatlon by the check-out operator in order to maximize the operation of the scanning assembly 18, to provide the scanning assembly informAtion as to when a merchandise item 36 is in the scanning area, and to en-able the operation of the scanning assembly, sensing means in the form of photo detectors hereinafter referred to as item gates are positioned ad~acent the front and rear of the aper-ture 24 to detect the presence or absence of a merchandiseitem 36 in that area. As shown in Fig. 1, the enter ltem gate may comprise a photodiode 42 or similar photoresponslve device mounted in an upstandlng rail member 44 located ad~acent one edge of the surface 26 of the checkout counter. Such photo-diode 42 is positloned upstream of the aperture 24 and at a predetermined helght above the surface 26 and recelved a con-tinuous beam of light from a conventional light source 46 lo-cated ln a rail member 48 mounted on the opposite edge of the i surface 26. An exit item gate comprising a similar photodiode 50 is positioned downstream of the aperture 24 in the rail mem-ber 44. The photodiode 50 receives a light beam from a light ¦ source 52 located in the opposite rail member 48. Both photo-diodes 42, 50 will generate a signal upon the interruption of the light beam in a manner that is well known ln the art.
Referrlng now to Flg. 2, there is shown a block diagram of the data processing system which incorporates the 1 .
~0803~9 scannlng assembly 18 of the present invention. Forward move-ment of a merchandise item 36 on the supporting surface 26 of the checkout counter (Fig. 1) will trip the enter item gate 54 by intercepting the light beam from the light source 46, thereby generating a control signal from the photodiode 42 over line 56 to a gate control logic unit 58 of the scanning system 60. The scanning system 60 of the present embodiment~ shown ln Flg. 2 within the dotted llnes, includes the scanning assembly 18 which further lncludes detection loglc for processing the sig-nal from the scanning assembly, the item enter and exit gates 54, 74 discussed above with respect to Fig. 1, an encoded data : processlng logic unit 61 which may in some applications com-prise a micro-processor for checking and decoding the encoded -data read by the scanning assembly 18 and for generating a signal to the gate control logic unit 58 indicating the validity of the read operation, and a conventional memory storage 65 and output buffer 64 for transmitting the data read over line 63 to a central processing unit (CPU) 66. Examples of encoded data checking circuits which may be used to check the data read by the scanning assembly 18 may be ~ound in Unlted States Patents Nos- 3,784,792, 3,906,203 and 3,753,227.
The control ~ignal transmitted from the enter item gate 54 to the gate control logic unit 58 upon th~ tripping of the gate 54 by a merchandlse item 36 will turn on the light source 20 in the scanning assembly 18 by transmitting a scanner enable s~gnal over line 62 to the scanning assembly 18. The -.
- 1~803S9 scanning assembly 18 will read the label 34 on the merchandise ltem 36 and transmit the data read to the encoded data process-ing loglc unit 61. The processing logic unit 61 will decode and check the encoded data to determine if the data is valid or not and then generate a control signal over line 68 to the ~ `
gate control logic unit 58 indicating a good or bad read oper~
atlon. In addition, the logic unit 61 will generate a signal - to light a display 70 on the checkout counter indicating a good read or a display 72 lndlcating a bad read. As will be described more fully hereinafter with respect to the gate control. logic unlt 58, the lndication of a good read as determined by the logic unit 61, together with the tripping of the enter gate 5~ :
and the exit gate 74 will provide the necessary control signals for operating the scanning assembly 18 in accordance with the present inventionO When the encoded data read by the scanning assembly 18 is determined to be valid by the logic unit 61, the data will be transmitted to the output buffer 64 prepara-tory for transmission over line 63 to the CPU 66 which will cause the data to be printed by the printer 76 and displayed in the display 78 of a data terminal device (not shown) uti-lized in the checkout operation.
Referring now to Fig. 3, there is shown circuit de-tails of a gate control logic unit 58 (Fig. 2) for controlling .I the operation of the scanning assembly 18, which taken in con-, ~unction with the flow diagram shown in Fig. 4 will disclose ~, the overall system structuré and operation. The logic circuit , .
: : , ' .: ' ' . . . . ..
1~i8~)3S9 of Fig. 3 employs J-K flip-flops 80, 82l 84 and 86 which are of the type including a bistable circuit having two stable states which may be referred to as the "set" or "high" and "re-set't or "low" states. Each such flip-flop includes a trigger input J such that a low to high transition on this input is always effective to switch the state of the flip-flop from its current state to the opposite state, and a reset input R such that a low to high transition thereon will switch the flip-flop from the set state to the reset state of the flip-flop when the flip-flop is in the set state. Eac~l flip-flop 80, 82, 84 and 86 also has a set output Q and a reset output Q and the arrangement is such that when the flip-flop is in the set state, the set and reset outputs are high and low, respectively, and such that when the flip-flop is in a reset state, the set and reset outputs are low and high, respectively. Each flip-flop further has a clock input C for operatlng the flip-flop in a ; manner well known in the art.
The loglc circuit shown ln Fig. 3, in addition to the flip-ilop 80, 82, 84 and 86, further includes a one-shot multi-vibrator 98 for llmiting the time of each scanning operation ofthe assembly 18. Prior to the movement of a merchandise item 36 past the aperture 24 (Fig. l) in the checkout counter sur-iace 26, the logic circuit of Fig. 3 is normally in an idle state with each of the flip-flops 80, 82, 84 and 86 in a reset conditlon. Upon movement of a merchandise item 36 through the light beam generated by the light source 46, the enter gate 54 ;~
_9_ :
~ . , . .. , ~ .
1(j80359 (Flg. 2) is tripped resulting in the signal lGE (Fig. 3) which is high being transmitted from the photodiode 42 over line 56 (Figs. 2 and 3) to one input of an AND gate 92 there-by enabling the AND gate 92. The other two inputs of the AND
gate 92 are both high at this time and include the output term lGL of the exit item gate 74 and the output term ~ of the flip-flop 86. The term lGL is the output term of an inverter 106 and is high when the term lGL of the exit item gate 74 is low~ the latter occurring when the exit item gate 74 is in its untripped co~dition. The AND gate 92 going high wlll enable an AND gate 94 over line 96 an(l further enable the single-shot multivibrator 98 for operation over line 100. The multivi-brator 98 functions as a time-out and will be reset after a two second operation, thereby controlling the length of tlme the scanning assembly 18 will be enabled.
The output term TOQ of the multivlbrator 98 upon going high will enable an AND gate 104 whose output term LON
will be transmitted over line 62 (Fig. 2 and 3) to the scann-lng assembly 18 which turns on the light source 20 (Fig. 1) 20 allowing the scanning assembly 18 (Fig. 2) to scan the encoded label 34 (Fig. 1) in the manner descrlbed previously.
The enabling of the AND gate 94 (Fig. 3) by the tripplng of the enter gate 54 (Fig. 2) will, in conJunction wlth the clock signal at the C input, set the J-K flip-flop ~-80 and thereby transfer the circuit of the gate control logic i unit 58 (Fig. 2) from an idle state to a first state. When ' ( -lG803S9 the control logic unit 58 is in the first state, the system is conditioned to operate only when one of the followlng events occur; the exit item gate 74 (Fig. ~) is tripped; a ; ' signal is received from the encoded data processing logic unit 61 indicating that a good read was obtained by the scanning assembly 18, or the multivibrator 98 times out.
Setting of the flip-flop 80 will result in the output term SIQ going high which conditions an AND gate 108 for opera-tion upon the tripping of the exit item gate 74 (Fig. 2).
If this event occurs lmmediately after the tripping of the enter item gate 54, a signal lGL generated by the photodiode 42 (Fig. 1) over line 109 (Fig. 2) to the control logic unit 58 will enable the AND gate 108 whose output will enable an AND gate 120 and thereby set the flip-flop 82 which places the control logic unit 58 in a second state. When in the second state, the control loglc unit 58 i8 conditloned to either comple,te the read operation upon recelving a good read slgnal from the procegsing logic unit 61 or require the operator to initiate another scannlng operation. This latter ' 20 event wlll occur if such good read signal is not received by the control logic unit 58 within two seconds or whatever time the multivibrator 98 is set to time out~ or if the exit item gate 74 returns to its uninterrupted state, the circuit of the logic control unit 58 returning to its idle state upon the enter gate 54 being cleared o~ a merchandise item in a manner that will now be descrlbed.
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1~80359 The output term SlQ of flip-flop ~0 (as shown in Fig. 3) is also applied to the OR gate 110 whose output is applied to one input of the AND gate 112. Upon the tlming out of the multivibrator 98, the output term TOQ of such multivibrator 98 goes high enabling AND gate 112 whose out-; put term BRA is transmitted over line 114, through OR gate 116 and over line 118 to set the flip-flop 86 and thereby put the circuit of the control logic unit 58 in a fourth state. The output term BRA indicating a bad read i3 also transmitted to the encoded data processing logic 61 over line 121 (Fig. 2) which turns on the display 72 indicating to the operator the bad read result of the scanning opera-tion, requiring the operator to lnitiate another read opera-tlon. When the circuit of the control logic unit 58 is in the fourth state, ~ valid read operation cannot be obtained and as described above, the system will return to the idle state in a manner descrlbed hereinafter upon the enter item gate 54 returning to its uninterrupted condition, thereby conditioning the scanning system 60 for a new read operation.
The output term SlQ of flip-flop 80 is al90 applied to one input of the OR gate 124, thereby conditioning the AND
gate 126 for operation upon receiving the term GRDD from the data processing logic 61 (Fig. 2) over line 68 indicating that a good read has been obtained from the scanning assembly 18, Wh~n this occurs the output of AMD gate 126 will set the flip-~lop 84 which puts the circuit of the control logic unit -12- ;~
.
' . . ~ , : : - - .
~ .. .. . .
10803Sg 58 in a third state. When the circuit reaches this third state, the light source 20 (Fig. 1) is turned off and steps are taken to transfer the decoded data from the data proc-essing logic 61 (Fig. 2) to the buffer 64 for further proc-essing by the processor 66.
The setting of flip-flop 82 upon the successive tripping of the enter 54 and exit gates 74, will make the output term S2Q of the flip-flop 82 high and the term S2Q
low. The output term S2Q going low will disable AND gate 94 whlle the term S2Q going high will condition the AND gate 126 to set the flip-flop 84 upon the receiving of the good read signal GRDD from the data processing logic unit 61.
The term S2Q is also applied to the AND gate 128 which is enabled by the return of the exit item gate 74 to its clear -or uninterrupted posltion which occurs when the merchandise ltem clears the exit item gate 74. This sets the flip-flop 86 through OR gate 116 which puts the circuit of the control loglc unit 58 in t;he fourth state. When in the fourth state, the clrcult indicates that the merchandise item has passed through the scannlng assembly 18 without a good read being obtained. As shown in Fig. 3, the output signal lGL of the exlt ltem gate 74 is transmitted over line 109 (Fig. 2) to inverter 106 whose output term lGL will be high when the exit gate 24 is in the uninterrupted position. The term S2Q is further applied to OR gate 110 thereby conditloning AND gate 112 to set the flip-flop 86 upon the timing out of the . '' ~
' ' ., .
-- . ~ ~ - ,.
lG803S9 multivibrator 98 in the manner described previously.
The setting of flip-flop ~4 which occurs when the good read signal GRDD has been transmitted from the proc-essing logic 61 to the AND gate 126 will result in the out-put term S3Q going hlgh while term S3Q goes low the latter of which disables AND gate 94 and AND gate 104 thereby turn-ing off the light source 20 in the scanning assembly 18. The term S3Q is applied to the AND gate 130 which conditions the ; AND gate 130 for operation upon the tripping of the exit item gate 74 and the receiving of a signal XBA from logic within the buffer 64 over line 90 indicating that the buffer 64 has space available to receive data from the storage 65 (Fig. 2) for transmission to the processor 66. The output signal of AND gate 130 is transmitted over line 132 to initiate the transfer of data to the buffer 64. Thls output signal is also . .
transmitted through OR gate 116 and over line 118 to set the fllp-flop 86. The term S3Q is further applied to OR gate 110 thereby conditioning AND gate 112 to set flip-flop 86 upon the timing out of the multivibrator 98.
. ~ :
' 20 The setting of flip-flop 86 upon the timmlng out of ¦ multivibrator 98, the enabling of AND gate 130 or AND gate 128 as described prevlously, results in the output term S4Q going hlgh while term ~ goes low, the latter of which disables AND ~:
gates 92, 120, and 126 thereby preventing the setting of flip-flop 80, 82 and 84. The term ~ also disables AND gate 104 after being applied to one of the lnputs of OR gate 119 which disables AND gate 104 from operation since the input term S3Q is low due to the ~lip-flop 84 being in a set condition.
As described previously, the output term LON of AND gate 104 ,' turns on the light source 20 in the scanning assembly 18 (Fig. 1). Output term S4Q going high further conditions AND
gate 134 for operation upon receivlng the signal lGE which goes high upon the enter ltem gate 54 returning to its un-interrupted condition after the merchandise item has cleared the gate. IGE going low will produce lGE in a high state after going through inverter 136. The output term RESET of AND gate 134 going high will reset the f'lip-flops 80, 82, 84 and 86 and the multivibrator 98 returning the logic circuit ~ ~
(Fig. 3) to the idle state preparatory to another read oper- ~ -ation.
Referring to Fig. 4 there is shown a flow diagram of the events that occur in the operation of the scanner unit 60 (Fig. 2). Prior to the movement of a merchandise item past the scanning assembly 18, the circuit of the control logic unit 58 (Fig. 3) is in the idle state which requires the enter item 20 gate 54 to be tripped in order to initiate a scanning operation. ~ -If the operator at this time moves the merchandise item past the aperture 24 ln the counter surface 26 without tripping the enter item gate but trips the exit item gate 74 or moves the item in the reverse direction~ thereby tripping the exit item gate 74 ~irst, the system will remain in the idle state and cycle between blocks 138 and 140.
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i .
108~3S9 Upon tripping o~ the item enter gate 54, the circuit will enter the first state wherein a clear read signal (block 142) is generated to condition the data processing logic 61 and its associated circuits for a new read operation, the scanning assembly 18 (Fig. 1) is turned on (block 144) and the multivibrator 98 (Fig. 3) is activated. If a good read is detected (block 146) the circuit will enter state 3 and the light source 20 (Fig. 1) will be turned off (block 148).
If the exit item gate 74 (Fig. 2) has been tripped (block 150) and the transmit buffer 64 (Fig. 2) is available to receive data (block 152), the good read display 70 (Fig. 2) is illum-inated (block 154) and the data is transferred to the buffer 64 (block 156) for transmission to the processor 66. The circuit is now in the fourth state. Upon the returning of the enter item gate to its clear condition (block 158), the circuit will return to the ldle state (block 138, 140) pre-paratory to anothe3r read operation.
If after the light source 20 (Fig. 1) has been turned on and the circuit of the control logic unit 58 fails to receive a good read signal from the data processing logic 61 (Fig. 2) the clrcuit will check the exit item gate (block 160) to see if it has been tripped~ If it has not, the cir-cuit will cycle until a good read signal is received (block ¦ 146) or the m~tivibrator 98 times out (block 162). If the latter occurs first, the light source 20 will be turned off (block 164), the Bad Read display 72 (Fig. 2) is illuminated ., .
.' ~
` ' ' ' ,:`
~ .- .. . ~ . - . . . . . . -3S~
(block 166) and the circuit returns to the idle state.
If the enter item gate 54 and exit item gate 74 are trlpped but the scanning assembly 18 falls to detect a good read, the circuit will go through blocks 160, 168, 170, and 172 to turn of~ the scanning assembly 18 preparatory to another read operation.
If a good read is obtained but the exit item gate 74 is not tripped, the circuit will cycle between block 150 and block 174 until a time out occurs thus resetting the scanning assembly 18 preparatory to a new read operation. If the exit item gate 74 does trip, but the buffer 64 (Fig. 2) is not available to receive the data, (block 152), the circuit will lndicate a bad read (block 166) and force the operator lnto another read operation.
It wlll be seen from the above descriptlon that the circuit of the control logic unit 58 will force a proper merchandise item movement past the scanning assembly 18 which re~uires that the enter ite~ gate be tripped before the exit ltem gate and before a good read slgnal is generated. The clrcuit will ignore an item movement in the reverse direction and will illuminate the bad read display if the above events do not occur in the sequence indicated, the transmit buffer i8 not available or lf only the enter item gate is tripped thereby ~orclng the operator to lnitiate a new read operation by moving ~ -the merchandise item in the proper direction pass the aperture 24 (Fig. 1) in the checkout counter surface 26.
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lG8~359 While only one embodiment of the invention has been described in detail herein and shown in the accompanying .
drawings, it will be obvious that variations and other em- :
bodiments are possible without departing from the scope of the invention~ It is thus contemplated that all such vari-ations and embodiments not departing from the spirit and scope of the invention hereof shall be construed ln accord-ance with the following claims.
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Claims (16)
1. A system for controlling the operation of a code reading device for reading data encoded indicia on a record member upon movement of the record member pass the reading device, said system comprising:
(a) a first detecting means positioned upstream of the code reading device for generating a first signal upon de-tecting the presence of a record member, said first signal initiating the operation of said code reading device;
(b) means responsive to the operation of the reading device for generating a second signal indicating the valid-ity of the indicia read by the code reading device;
(c) a second detecting means positioned downstream of the code reading device for generating a third signal upon detecting the presence of a record member;
(d) and logic means responsive to said first, second and third signals for determining the validity of said read operation including means actuated by said first signal for disabling said logic means after a predetermined time has elapsed thereby limiting the time said signals are to be generated.
(a) a first detecting means positioned upstream of the code reading device for generating a first signal upon de-tecting the presence of a record member, said first signal initiating the operation of said code reading device;
(b) means responsive to the operation of the reading device for generating a second signal indicating the valid-ity of the indicia read by the code reading device;
(c) a second detecting means positioned downstream of the code reading device for generating a third signal upon detecting the presence of a record member;
(d) and logic means responsive to said first, second and third signals for determining the validity of said read operation including means actuated by said first signal for disabling said logic means after a predetermined time has elapsed thereby limiting the time said signals are to be generated.
2. The invention according to claim 1 wherein said logic means includes first and second bistable means capable of being set to a first state and a second state, said first bistable means being responsive to said first signal so that 2 (concluded) said first bistable means changes from said first state to said second state upon the detection of a record member by said first detecting means, said second bistable means being coupled to said first bistable means and responsive to said second signal for changing from said first state to said second state as long as said first bistable means is in said second state, said logic means further includes a first logic gate coupled to said second bistable means and responsive to said third signal as long as said second bistable means is in said second state to provide a fourth signal indicating a good read operation of said code reading device.
3. The invention according to claim 2 wherein said logic means further includes a third bistable means capable of being set to a first state and a second state, said third bistable means being coupled to said first bistable means and responsive to said third signal to change from said first state to said second state upon the detection of a record member by said second detecting means as long as said first bistable means is in said second state, said logic means includes a second logic gate coupled to said second bistable means and response to said second signal as long as said third bistable means is in said second state to set said second bistable means to said second state.
4. The invention according to claim 3 in which the system further includes means for storing data read by said code reading device and processing means for generating a fifth signal indicating said storage means is available to store the data read by said code reading means, said first logic gate being responsive to said fifth signal as long as said second bistable means is in said second state to provide said fourth signal indicating a good read operation of said code reading device.
5. The invention according to claim 4 which further includes indicator means responsive to said fourth signal to indicate a good read operation of said code reading device.
6. The invention according to claim 4 in which said first detecting means generates a sixth signal upon detecting the absence of a record member, said logic means further in-cludes a fourth bistable means capable of being set to a first state and a second state, said fourth bistable means being coupled to said first logic gate and responsive to said fifth signal to change from said first state to said second state, said logic means further includes a third logic gate coupled to said first, second and third bistable means and responsive to said sixth signal when the fourth bistable means is in said second state to set said first, second and third bistable means to said first state to condition the logic means for a new read operation.
7. The invention according to claim 6 in which said disabling means comprise a fifth bistable means capable of being set to a first state and a second state, said fifth bistable means being responsive to said first signal so that said fifth bistable means changes from said first state to said second state for a predetermined time interval, said first bistable means being coupled to said fourth bistable means to set said fourth bistable means to said second state upon being set to said first state upon the lapse of the time interval.
8. The invention according to claim 7 which further includes second indicator means responsive to said fifth bistable means being set to said first state after the lapse of said predetermined time interval to indicate a bad read operation of said code reading device.
9. A system for controlling the operation of a code reading device for reading data encoded indicia on a record member upon movement of the record member pass the reading device, said system comprising:
(a) a first detecting means positioned upstream of the code reading device for generating a first signal upon de-tecting the presence of a record member and a second signal upon detecting the absence of a record member, said first signal initiating the operation of said code reading device;
9 (concluded) (b) means responsive to the operation of the code read-ing device for generating a validity signal indicating the data read by the code reading device is valid;
(c) a second detecting means positioned downstream of said code reading device for generating a third signal upon detecting the presence of a record member and a fourth signal upon detecting the absence of a record member;
(d) and logic means responsive to said first, third and validity signals for determining the validity of the read operation of the code reading device including a reset inter-val determining means actuated by said first signal for dis-abling said logic means after a predetermined time interval has elapsed thereby limiting the time said third and validity signal are to be generated.
(a) a first detecting means positioned upstream of the code reading device for generating a first signal upon de-tecting the presence of a record member and a second signal upon detecting the absence of a record member, said first signal initiating the operation of said code reading device;
9 (concluded) (b) means responsive to the operation of the code read-ing device for generating a validity signal indicating the data read by the code reading device is valid;
(c) a second detecting means positioned downstream of said code reading device for generating a third signal upon detecting the presence of a record member and a fourth signal upon detecting the absence of a record member;
(d) and logic means responsive to said first, third and validity signals for determining the validity of the read operation of the code reading device including a reset inter-val determining means actuated by said first signal for dis-abling said logic means after a predetermined time interval has elapsed thereby limiting the time said third and validity signal are to be generated.
10. The invention according to claim 9 wherein said logic means includes a first and second bistable means capa-ble of being set to a first state and second state, said first bistable means being responsive to said first signal so that said first bistable means is changed from said first state to said second state, said second bistable means coupled to said first bistable means and responsive to said validity signal for changing from said first state to said second state when said first bistable means is in said second state, and said logic means includes a first logic gate coupled to said 10 (concluded) second bistable means and responsive to said third signal as long as said second bistable means is in said second state to provide a valid read signal indicating a valid read operation of the code reading device.
11. The invention according to claim 10 wherein said logic means further includes a third bistable means capable of being set to a first and second state, said third bistable means being coupled to said first bistable means and responsive to said third signal to change from said first state to said second state when said first bistable means is in said second state, and said logic means further includes a second logic gate coupled to said second and third bistable means and re-sponsive to said validity signal when said third bistable means is in said second state to set said second bistable means to said second state whereby, upon the generation of said third signal, said first logic gate will generate said valid read signal.
12. The invention according to claim 11 which further includes indicator means responsive to said valid read signal to indicate a valid read operation of said code reading device.
13. The invention according to claim 11 wherein said logic means further includes a fourth bistable means capable 13 (concluded) of being set to a first and second state, said fourth bistable means coupled to said third bistable means and responsive to said fourth signal to change from said first state to said second state when said third bistable means is in said second state, and said logic means further includes a third logic gate coupled to each of said bistable means and responsive to said second signal when said fourth bistable means is in said second state to generate a reset signal to set each of said bistable means to said first state.
14, The invention according to claim 13 in which said reset interval determining means comprises a fifth bistable means capable of being set to a first and second state, said fifth bistable means responsive to said first signal to change to said second state for a predetermined time interval after which the fifth bistable device returns to said first state, said fifth bistable means being coupled to said fourth bistable means to set said fourth bistable means to said second state upon the lapsing of the time interval.
15. The invention according to claim 14 which further includes second indicator means responsive to said fifth bistable means being set to said first state after the lapse of said predetermined time interval to indicate a bad read operation of said code reading device.
16. A method for operating a code reading device which reads data encoded indicia on a record member that is moved past the code reading device comprising the steps of:
(a) generating a first signal indicating the presence of a record member upstream of the code reading device;
(b) initializing a reset interval time period in response to the generating of said first signal;
(c) operating a code reading device in response to the generating of said first signal;
(d) checking the data read by said code reading device;
(e) generating a second signal indicating the data read is valid;
(f) generating a third signal upon detecting the record member downstream of the code reading device;
(g) and generating a good read signal upon the generating of said second and third signal before the reset interval time period has elapsed.
(a) generating a first signal indicating the presence of a record member upstream of the code reading device;
(b) initializing a reset interval time period in response to the generating of said first signal;
(c) operating a code reading device in response to the generating of said first signal;
(d) checking the data read by said code reading device;
(e) generating a second signal indicating the data read is valid;
(f) generating a third signal upon detecting the record member downstream of the code reading device;
(g) and generating a good read signal upon the generating of said second and third signal before the reset interval time period has elapsed.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US05/709,741 US4086476A (en) | 1976-07-29 | 1976-07-29 | Control circuit for a code reading device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1080359A true CA1080359A (en) | 1980-06-24 |
Family
ID=24851148
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA282,667A Expired CA1080359A (en) | 1976-07-29 | 1977-07-13 | Control circuit for a code reading device |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US4086476A (en) |
| JP (1) | JPS5317027A (en) |
| CA (1) | CA1080359A (en) |
| DE (1) | DE2733766C2 (en) |
| FR (1) | FR2360134A1 (en) |
| GB (1) | GB1563568A (en) |
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| DE2809320A1 (en) * | 1978-03-03 | 1979-10-11 | Rolf Neusel | Blood pressure measuring system - has flow sensitive converter in passage between two chambers in sleeve and electronic processing system |
| JPS5668868A (en) * | 1979-11-12 | 1981-06-09 | Fujitsu Ltd | Bar-code reader |
| JPS6213160Y2 (en) * | 1980-07-14 | 1987-04-04 | ||
| DE3041109A1 (en) * | 1980-10-31 | 1982-06-09 | GAO Gesellschaft für Automation und Organisation mbH, 8000 München | IDENTIFICATION ELEMENT |
| JPS59189477A (en) * | 1983-04-12 | 1984-10-27 | Toyota Motor Corp | Article discriminating device |
| US4679154A (en) * | 1985-07-09 | 1987-07-07 | Ncr Corporation | Scanning control system for merchandise checkout |
| US4716281A (en) * | 1986-05-27 | 1987-12-29 | Ncr Corporation | Method for controlling terminal display indication |
| US5138141A (en) * | 1988-12-05 | 1992-08-11 | Ncr Corporation | Method and apparatus for repeating the output of an optical scanner |
| US5107140A (en) * | 1989-10-31 | 1992-04-21 | Intermec Corporation | Anticipatory automatic gain control circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3086121A (en) * | 1959-10-27 | 1963-04-16 | Gen Electric | Photosensitive code reading system |
| US3627990A (en) * | 1960-02-29 | 1971-12-14 | Addressograph Multigraph | Sensing mechanisms |
| US3229073A (en) * | 1961-12-12 | 1966-01-11 | Burroughs Corp | Synchronized reading apparatus |
| US3496340A (en) * | 1965-06-30 | 1970-02-17 | Honeywell Inc | Record handling apparatus |
| US3562494A (en) * | 1967-11-24 | 1971-02-09 | Fmc Corp | Code detecting and control circuit for sorting articles |
| US3586833A (en) * | 1969-09-12 | 1971-06-22 | Burroughs Corp | Card reader format control system |
| US3609306A (en) * | 1969-12-08 | 1971-09-28 | Gen Electric | Sequential code reader |
| DE2264517C3 (en) * | 1971-04-30 | 1980-08-28 | Rca Corp., New York, N.Y. (V.St.A.) | Device for reading binary information visually recorded on an information carrier |
| CH540533A (en) * | 1971-07-08 | 1973-08-15 | Zellweger Uster Ag | Method and apparatus for controlling the light source of an optical reading device |
-
1976
- 1976-07-29 US US05/709,741 patent/US4086476A/en not_active Expired - Lifetime
-
1977
- 1977-07-13 CA CA282,667A patent/CA1080359A/en not_active Expired
- 1977-07-25 JP JP8846877A patent/JPS5317027A/en active Granted
- 1977-07-26 GB GB31285/77A patent/GB1563568A/en not_active Expired
- 1977-07-27 DE DE2733766A patent/DE2733766C2/en not_active Expired
- 1977-07-29 FR FR7723425A patent/FR2360134A1/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6110872B2 (en) | 1986-03-31 |
| FR2360134B1 (en) | 1980-08-29 |
| DE2733766C2 (en) | 1986-07-17 |
| FR2360134A1 (en) | 1978-02-24 |
| DE2733766A1 (en) | 1978-02-02 |
| JPS5317027A (en) | 1978-02-16 |
| GB1563568A (en) | 1980-03-26 |
| US4086476A (en) | 1978-04-25 |
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