CA1067210A

CA1067210A - Method of making mos device

Info

Publication number: CA1067210A
Application number: CA270,677A
Authority: CA
Inventors: Hiroshi Okazaki; Tomisaburo Okumura; Akira Tsuchitani; Seiji Ueda
Original assignee: Matsushita Electronics Corp
Current assignee: Panasonic Holdings Corp
Priority date: 1976-01-30
Filing date: 1977-01-28
Publication date: 1979-11-27
Also published as: US4113533A; FR2339954B1; DE2702922A1; GB1553533A; JPS5293278A; FR2339954A1

Abstract

METHOD OF MAKING MOS DEVICE
ABSTRACT
The invention relates to a method of making MOS
semiconductor devices. A single crystal silicon substrate has the following layers formed thereon according to a pre-determined pattern: firstly there is an oxide film next to the silicon substrate, secondly a high-temperature-resistive film (such as a metal or polycrystalline silicon) overlies the oxide film and thirdly an oxidation preventing film overlies the high-temperature-resistive film. The high-temperature-resistive film is eventually to become a gate electrode and should resist melting during the step of diffusing an impurity into the substrate at exposed parts thereof to form source and drain regions. After the diffusion step the device is subjected to thermal oxidation so that the exposed side-end parts of the high-temperature-resistive film and the exposed parts of the substrate are oxidized. Further steps are then carried out in the preparation of the device. By this method the usual overhang of the edges of the high-temperature-resistive layer is avoided thereby improving the drain-breakdown voltage, lowering the gate leakage current and reducing the possibility of open circuit conditions in vapor-deposited metal wiring films.

Description

This invention relates to a method of making self-alignment type metal oxide semiconductor devices (hereinafter referred to as MOS devices).
Background of the Invention Conventional methods of making self-alignment type MOS
devices have involved the formation of a gate insulation film of thin SiO2 over the whole of the surface of a substrate of one conductivity having thick SiO2 films at specified parts. A further film, eventually to become the gate conductor film, of polycrystalline silicon is formed over the whole of the surface of the gate insulation film. The polycrystalline film is then etched in a specific pattern for the gate and connecting wiring by a photoresist film method. Subsequently the gate insulation film etched at the exposed parts to form openings to the substrate through which impurities can be diffused to form source and drain regions. However, the side edges of the gate insulation film lying underneath the polycrystalline film become undercut during the etching step. Further steps are carried out in the method but the undercut portions result in a deterioration of the electrical characteristics of the device, and it is an object of the invention to reduce or eliminate such undercutting.
Summary of the Invention According to one aspect of the invention there is provided a method of making a metal-oxide semiconductor device, comprising the following steps: (i) sequentially forming on specified parts of a single crystal substrate:
(a) an oxide film; (b) a metal film or a film which will become conductive upon further treatment, said film being of a high-temperature-resistive nature, and being capable

- 2 -" 'O

1~67Z10 of resisting melting at impurity-diffusion temperatures, of serving as a diffusion mask and of later serving as a gate electrode; and (c) an oxidation-preventing film for preventing oxidation of said metal film or said film which will become conductive upon further treatment, wherein said metal film or said film which will become conductive upon further treatment, and said overlying oxidation-preventing film have substantially the same pattern so that oxidation of said metal film or said film which will become conductive on further treatment is prevented by said oxidation-preventing film; and (ii) diffusing an impurity into the substrate from the parts thereof which are not covered by said metal film or said film which will become conductive upon further treatment and said oxidation preventing film; the method being characterized by an oxidizing process including the step of thermally oxidizing side-end parts of said metal film or said film which will become conductive upon further treatment and also the exposed surfaces of said silicon substrate during said diffusion step to form a thin and dense oxidized film in such conditions that said oxidation-preventing film is retained on said metal film, and a subsequent step of forming a thicker and less dense oxide film thereon by chemical vapor deposition after said oxidation-preventing film is removed.
This invention purports to eliminate the above-mentioned shortcomings by forming thermally oxidized SiO2 film on the side-end parts of the gate conductor film so as to fill the hollow parts under the end part of the gate conductor film with sufficiently dense SiO2 film and to make the eaves-shaped side-end parts of the ~ _ 3 _ ;~

gate conductor film round.
Preferred embodiments of the method of the present invention are disclosed in the following with reference to the accompanying drawings.
Brief Explanation of the ~rawing Fig. 1 is a sectional side view of a conventional MOS
device;
Fig. 2 is a sectional side view of one step of making a conventional MOS device;
Figs. 3(a) to 3(c) are sectional side views of various steps of making MOS devices according to one embodiment of the present invention;
Fig. 4 shows a circuit diagram for measuring the characteristics of the MOS device of Fig. 3; and Fig. 5 is a graph showing the differences of drain reverse breakdown voltage of the MOS devices of Fig. 3 and of Fig. 1.

- 3a -Detailed Disclosure of the Preferred Embodiments A conventional method of making self-alignment type MOS devices is further described with reference to Figs. 1 and 2.
Fig. 1 shows a sectional side view of a self-alignment type MOS FET on a single silicon crystal substrate 1. Thick films 2 of thermally oxidixed SiO2 are first formed on the substrate 1 to prevent a parasitic MOS effect. A thin gate insulation film 3 of SiO2 is then formed on the substrate by thermal oxidation followed by a polycrystalline film 4 which will become a gate conductor film when an impurity is diffused therein. Finally, a CVD-deposited insulation film 8 is formed over the principal surfaces of the substrate and also the side-end parts of the gate insulation film 3. Impurity-diffused source and drain regions 6 and 7 are formed in the substrate as shown.
The method of making the conventional MOS device of Fig. 1 is as follows. The gate insu]ation film 3, which is a thin SiO2 film, is formed over the whole of the surface of the substrate 1 of one conductivity type and having the thick films 2 located on specified parts thereof. The film 4, which will become the gate conductor film~of polycrystalline silicon is formed on the whole of the surface of the gate insulation film 3. Then the polycrystalline silicon film 4 is etched away according to the specified pattern of the gate and connecting wirings by utilizing a known photoresist film method. Subsequently, the gate insulation film 3 is etched away in the thus-exposed parts so that openings are formed through which impurities are diffused to form source and drain regions 6 and 7. The etching is carried out for a sufficient length of time to completely remove the gate insulation film 3 ~067;~0 at the exposed parts. As a consequence of this prolonged etching, the side-end parts of the gate insulation film 3 underneath the polycrystalline silicon film 4 are side-etched thereby making the end parts of the polycrystalline silicon film 4 eave-shaped with hollow parts 5 thereunder. In the conventional MOS device, such hollow parts 5 remaln unfilled even after chemical vapor deposition of the SiO2 film 8 which covers the gate conductor film 4. Even when the CVD film 8 does fill the hollow parts 5, the CVD film 8 in the hollow parts become porous and of low density and therefore liable to be contaminated and cause poor electrlc characteristics, namely low drain or source reverse breakdown voltages through the gate. When the side-etching underneath the gate conductor 4 becomes large, the eaves-shaped end parts 9 of the gate conductor 4 tend to collapse, thereby forming cracks therein which increase the gate leakage current and adversely affect the electric characteristic of the MOS device. As a further consequence of the side-etching, steep steps 81 are formed on the surface of the CVD film 8 near the hollow parts 5, thereby resulting in the formation of very thin parts in the aluminum wiring film at the steep steps 81. Moreover, the steep steps 81 retain etchant so that excessive etching takes place there and may cause a circuit breaking of the Al wiring film.
A preferred method according to the invention will now be described. As shown in Fig. 3(a), thick films 2 of SiO2 of 0.5~m to 1.5~m in thickness are formed on specified parts of a single silicon crystal 1 for the prevention of a parasitic MOS effect by encircling the MOS unit (which could be, for instance, an FET). The film 2 is formed by heating the substrate 1 in an oxidizing atmosphere followed by selective etching through a photoresist mask. Then a gate ~67Z10 insulation film 3 of SiO2 of O.l~m to 0.15~m is formed on the exposed surfaces by a thermal oxidation method. Subsequently a film 4, which is to become a gate conductor film, e.g. a polycrystalline silicon film of 0.2~m to 0.6~m, is formed by vapor phase growth at 600C to 900 C over the whole of the substrate 1 having the thick films 2 of the specified pattern.
Then an antioxidation film 10 of silicon nitride (Si3N4) of 0.08~m to 0.2~m in thickness is formed over the whole of the surface of the substrate by a known chemical vapor deposition method at 800 to 1000C. Next, the anti-oxidation film 10 is selectively etched with a photoresist mask having a specified gate pattern by means of plasma etching with freon gas.
After the etching, the photoresist film is removed, and then, by utilizing the remaining Si3N4 film of the gate pattern as a mask, the polycrystalline silicon film 4 is etched by a known etchant mixture of nitric acid and fluoric acid and subsequently the gate insulation film 3 is etched to excess by a well known etchant mixture of ammonium fluoride and fluoric acid, namely until the side-end parts of the gate insulation film 3 underneath the gate conductor film 4 are side-etched to form concave parts 5,5 as shown in ~ig. 3(a).
Then impurities 11, 12 for forming the source and drain regions, for instance boron decomposed from B2H6, are deposited on the surface of the source and drain parts of the substrate 1 exposed by the etched openings 31 and 32. Excessive amounts of the impurity on the surface of the substrate 1 are removed by etching firstly with a solution of fluoric acid and subsequently with a solution of nitric acid and the substrate is then washed with deionized water.
The resulting wafer is treated in a wet oxygen atmosphere at 1000 C to 1100 C, thereby forming a dense silicon ~67~10 oxide film 14 on the eaves-shaped side-end parts of the poly-crystalline silicon film 4. At the same time, the atoms of the impurity source diffuse into the substrate thereby forming the source region 6 and the drain region 7, and furthermore, the surfaces of the source region 6 and the drain region 7 are thermally oxidized to form a dense silicon oxide film 13 in such a manner as to be continuous with the dense silicon oxide film 14 on the side-ends of the gate insulation film 3.
Since the oxidizing speed of the Si3N4 is very low, the silicon oxide film formed on the Si3N4 film 10 is very thin. Thus, as shown in Fig. 3(b), the concave parts 5,5 are completely eliminated, and dense silicon oxide films 14 are formed by the thermal oxidation of the end parts of said polycrystalline silicon film 4 and the surfaces of the source region 6 and drain region 7. The SiO2 films 14 formed by the thermal oxidation of the side-end parts of the polycrystalline gate film 4 are dense and strong in comparison with conventional porous CVD films formed in the hollow parts under the gate conductor film, and accordingly the SiO2 films 14 function to improve the gate breakdown voltage. Furthermore, since the side-end parts of the gate conductor film 4 are made round by the abovementioned thermal oxidation, the concentration of the electric force line is moderate at the side-end parts of the gate conductor film 4.
The thin SiO2 film on the Si3N4 film 10, formed in the abovementioned heat treatment, is then removed by a mixed solution of ammonium fluoride and fluoric acid, subsequently the anti-oxidation film Si3N4 10 is removed by hot phosphoric acid and the wafer is washed with deionized water and dried.
In order to give the necessary parts of the polycrystalline film 4 the desired conductivity, an impurity is selectively ~67210 vapor-deposited on the necessary parts by a known photochemical method, and subsequently the surplus impurity is etched away, the wafer is washed with deionized water and then dried. An insulation film 8, for instance an SiO2 film, is then grown as shown in Fig. 3(c) by a known chemical vapor deposition method over the whole of the principal surfaces, for example by the thermal decomposition of a monosilane. The wafer is then subjected to a heat treatment to diffuse the impurity into the polycrystalline silicon film 4 thereby giving it a sufficient conductivity so as to function as a gate electrode and as interconnecting conductors. The wafer obtained in the above-mentioned way is then treated by known steps including the vapor deposition of an interconnecting metal film (not shown) on the CVD film 8 to form a self alignment MOS device.
As described above, the side-end parts of the g~te conductor film 4 are rounded by the thermal oxidation process and covered by a thermally oxidized dense insulation film 14.
Therefore the gate breakdo~n voltage characteristic of the device is improved. Moreover, as shown in Fig. 3(c), the surface of the gate conductor film 4 and the surfaces of the parts of the thermally oxidized SiO2 film 13, which parts are on the source region 6 and the drain region 7 and are adjacent to the gate conductor film 4, can be formed with very little level difference from each other, and the surfaces of the boundary parts therebetween are smooth in comparison with the steep step formed by the conventional method. Therefore, the metal films formed on the CVD film 8 are stable and the possibility of an open circuit cGndition of the metal film is substantially eliminated resulting in a high yield in manufacture.
Fig. 5 is a graph showing the difference of drain ~67210 breakdown voltages of the MOS FETs made by the steps of Figs. 3(a) to (c) and those of conventional MOS FETs. The MOS FETs tested for the comparison were as follows:
substrate ........ phosphor-doped N type single crystal of (111) axis with specific resistivit-ies of ~I-7~cm~

source and drain regions .... 1.0 - 1.3 ~m deep boron diffused regions, having surface impurity concentration of lxlO 9 - lxlO
atoms/cm3, channel .......... width 188 ~m, length 8 ~m, enhancement type P-channel.
The MOS FETs were tested in a circuit as shown by Fig. 4, wherein the gate electrode 16, the source electrode 18 and the substrate 1 were connected to the positive end of a variable voltage source 20, the drain electrode 17 was connected through an ammeter 21 to the negative end of the variable voltage source 20, and a voltmeter 22 was connected across both ends of the variable voltage source 20.
In Fig. 5, the hatched bars with dotted outlines indicate the distributions of the drain breakdown voltage of MOS FETs made by the conventional method and the white bars with solid outlines indicate those of the MOS FETs made by the method of the present invention. As shown in the graph, the improvement of the drain breakdown voltage of the MOS
device of the present invention compared with those of the conventional manufacture is by about 10 volts.

The present invention is also applicable to N-channel silicon gate self-alignment MOS devices which have source and drain regions doped with phosphorus decomposed from PH3 so g _ ~)67;~:10 as to have surface concentration of lxlOl9-lx102 atom/cm3, and has the same effect as described in the above.
Another embodiment of the present invention employs an additional step after the excessive etching of the gate insulation film 3 of Fig. 3(a) and before the forming of the thermally oxidized film 13 of Fig. 3(b). ~he additional step is the step of selectively etching away the side end pro-trusions of the polycrystalline silicon film 4 and a part of the uppermost part of the polycrystalline film 4 of Fig. 3(a) by means of a known etchant, which is capable of selectively etching the polycrystalline film 4 only and consists of a mixture of nitric acid, fluoric acid and water.
Another embodiment employs a gate conductor film 4 made of a layer or layers of high-temperature-resistive metal, for instance titanium, zirconium, niobium, tantalum, chromium, molybdenum, tungsten, paradium or platinum, or alloy(s) of these metals, which do not melt away or are not oxidized in the high-temperature treatment for the impurity diffusion, serve as the diffusion mask and function as a gate electrode and interconnection wires.
Another embodiment employs an aluminim oxide (alumina) film as the abovementioned antioxidation film 10.
As is described in the above, in the method of making the self-alignment type MOS device or MQS IC of the preferred embodiment of the present invention, the thermal oxidation step of Fig. 3(b) forms a dense SiO2 film 13 after the upper face of the conductor film 4 (made for instance of a polycrystalline silicon film), by an anti-oxidation film 10 (made for instance of Si3N4 or an alumina film). Accordingly, the eaves-shaped side-end parts 41, 41 of the conductor film 4, which are formed by the side-etching of the gate insulation 1067;~:10 film 3, are made round and smoothly continuous with the side-end parts o the underlying gate insulation film 3.
Moreover, the continuous surfaces of the side-end parts of the conductor film 4 and the gate insulation film 3 are covered by dense SiO2 films, which serve to prevent contaminat-ion of the gate insulation film and assures stable performance without deterioration of the breakdown voltages and eliminating open-circuiting of the vapor deposited metal films (not shown).

Claims

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:

1. A method of making a metal-oxide semiconductor device, comprising the following steps:
(i) sequentially forming on specified parts of a single crystal substrate:
(a) an oxide film;
(b) a metal film or a film which will become conductive upon further treatment, said film being of a high-temperature-resistive nature, and being capable of resisting melting at impurity-diffusion temperatures, of serving as a diffusion mask and of later serving as a gate electrode; and (c) an oxidation-preventing film for preventing oxidation of said metal film or said film which will become conductive upon further treatment, wherein said metal film or said film which will become conductive upon further treatment, and said overlying oxidation-preventing film have substantially the same pattern so that oxidation of said metal film or said film which will become conductive on further treatment is prevented by said oxidation-preventing film; and (ii) diffusing an impurity into the substrate from the parts thereof which are not covered by said metal film or said film which will become conductive upon further treat-ment and said oxidation preventing film;
the method being characterized by an oxidizing process including the step of thermally oxidizing side-end parts of said metal film or said film which will become conductive upon further treatment and also the exposed surfaces of said silicon substrate during said diffusion step to form a thin and dense oxidized film in such conditions that said oxidation-preventing film is retained on said metal film, and a subsequent step of forming a thicker and less dense oxide film thereon by chemical vapor deposition after said oxidation-preventing film is removed.

2. A method of making a metal-oxide semiconductor device, comprising the following steps:
(i) sequentially forming on specified parts of a single crystal silicon substrate:
(a) an oxide film;
(b) a metal film or a film which will become conductive upon further treatment, said film having a specified pattern and being of a high-temperature-resistive nature, and being capable of resisting melting at impurity-diffusion temperatures, of serving as a diffusion mask and of later serving as a gate electrode;
and (ii) diffusing an impurity into the substrate from the parts thereof not covered by said metal film or said film which will become conductive upon further treatment and said oxidation preventing film;
characterized in that the method includes the step of forming an oxidation-preventing film for preventing oxidation of said metal film or said film which will become conductive upon further treatment in such a manner that the oxidation preventing film has the same pattern as the metal film or the film which will become conductive upon further treatment, and the subsequent step of thermally oxidizing side-end parts of said metal film or the film which will become conductive upon further treatment and also the exposed surfaces of said silicon substrate during said diffusion step to form a thin and dense oxidized film thereon in such conditions that said oxidation-preventing film is retained on said metal film and then forming a thicker and less dense oxide film thereon by chemical vapor deposition, after said oxidation-preventing film is removed.

3. A method according to claim 1 wherein said high-temperature-resistive film is one or more layers of a substance selected from polycrystalline silicon, titanium, zirconium, niobium, tantalum, chromium, molybednum, tungsten, and paladium, or an alloy of more than one of these substances.

4. A method according to claim 1 wherein said oxidation preventing film is one or more layers of a material selected from the group consisting of silicon nitride (Si3N4) and alumina (Al2O3).

5. A method according to claim 1 wherein the pattern of said oxidation preventing film is made by a photoetching process utilizing a photoresist mask and the pattern of said high-temperature-resistive film is made by selective etching utilizing the etched pattern of said oxidation preventing film as a mask.

6. A method according to claim 1 wherein said oxide film is selectively etched in regions not covered by said high-temperature-resistive film to form openings for the diffusion of impurities by utilizing said oxidation preventing film and said high-temperature-resistive film as a mask.

7. A method according to claim 1 wherein the diffusion of said impurity for making regions of opposite conductivity type to that of said substrate is carried out in a wet oxygen atmosphere at a temperature of 1000° - 1100°C.

8. A method according to claim 2 wherein said high-temperature-resistive film is one or more layers of a substance selected from the group consisting of polycrystalline silicon, titanium, zirconium, niobium, tantalum, chromium, molybdenum, tungsten and paladium, or an alloy of two or more of these substances.

9. A method according to claim 2 wherein said oxidation preventing film is one or more layers of a material selected from the group consisting of silicon nitride (Si3N4) and alumina (Al2O3).

10. A method according to claim 2 wherein the pattern of said oxidation preventing film is made by a photoetching process utilizing a photoresist mask and the pattern of said high-temperature-resistive film is made by selective etching utilizing the etched pattern of said oxidation preventing film as a mask.

11. A method according to claim 2 wherein said oxide film is selectively etched to expose said silicon substrate for the diffusion of impurities by utilizing said oxidation preventing film and said high-temperature-resistive film as a mask.

12. A method according to claim 2 wherein the thermal diffusion of said impurity into the silicon substrate for making regions of opposite conductivity type to that of the substrate is carried out in a wet oxygen atmosphere at a temperature of 1000° - 1100°C.

13. A method of making a metal-oxide semiconductor device, compising the following steps:
(i) sequentially forming on specified parts of a single crystal silicon substrate:
(a) silicon oxide film;
(b) a polycrystalline silicon film to serve as a conductor film after further treatment, a diffusion mask and later as a gate electrode; and (c) an antioxidation film for preventing oxidation of said polycrystalline silicon film, wherein said polycrystalline silicon film and said overlying antioxidation film have substantially the same pattern so as to prevent oxidation of said polycrystalline silicon films; and (ii) diffusing an impurity into the substrate from parts thereof other than those covered by said poly-crystalline silicon film and said antioxidation film;
the method being characterized by an oxidizing process consisting of a step of thermally oxidizing the side-end parts of said polycrystalline silicon film and also the exposed surfaces of said silicon substrate during said diffusion step to form a thin and dense oxidized film in such conditions that said antioxidation film is retained on said polycrystalline silicon film, and a subsequent step of forming a thicker and less dense oxide film thereon by chemical vapor deposition after said anti-oxidation film is removed.

14. A method of making a metal-oxide semiconductor device, comprising the following steps:
(i) sequentially forming on specified parts of a single crystal silicon substrate:

(a) a silicon oxide film;
(b) a polycrystalline silicon film having a specified pattern to serve as a conductor film on further treatment, and to serve as a diffusion mask and later as a gate electrode; and (c) diffusing an impurity into the substrate from the parts thereof not covered by said polycrystalline silicon film;
characterized in that the method includes a step of forming an antioxidation film over the polycrystalline silicon film to prevent oxidation of said polycrystalline silicon film in such a manner that the antioxidation film has substantially the same pattern as said polycrystalline silicon film, and a subsequent step of thermally oxidizing the side-end parts of said polycrystalline silicon film and also the exposed surface of said silicon substrate during said diffusion step to form a thin and dense oxidized film in such conditions that said antioxidation film is retained on said polycrystalline silicon film, and then forming a thicker and less dense oxide film thereon by chemical vapor deposition after said antioxidation film is removed.

15. A method according to claim 13 wherein said anti-oxidation film is one or more layers of a material selected from the group consisting of silicon nitride (Si3N4) and alumina (Al2O3).

16. A method according to claim 13 wherein the pattern of said antioxidation film is produced by a photoetching process utilizing a photoresist mask and the pattern of said polycrystalline silicon film is made by selective etching utilizing the etched pattern of said antioxidation film as a mask.

17. A method according to claim 13 wherein said oxide film is selectively etched to form openings for the diffusion of an impurity into the silicon substrate by utilizing said antioxidation film and said polycrystalline silicon film as a mask.

18. A method according to claim 13 wherein the thermal diffusion of said impurity into the silicon substrate for making regions of opposite conductivity type to that of the substrate is carried out in a wet oxygen atmosphere at a temperature of 1000° - 1100°C.